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Power ISA™ Version 2.03 - Power.org

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<strong>Version</strong> <strong>2.03</strong><br />

3.2.2 Data Cache Instructions<br />

Data Cache Block Allocate X-form<br />

Data Cache Block Touch<br />

X-form<br />

dcba RA,RB<br />

[Category: Embedded]<br />

dcbt<br />

dcbt<br />

RA,RB,TH [Category: Server]<br />

TH,RA,RB [Category: Embedded]<br />

31 /// RA RB 758 /<br />

0 6 11 16 21 31<br />

31 / TH RA RB 278 /<br />

0 6 7 11 16 21 31<br />

Let the effective address (EA) be the sum (RA|0)+(RB).<br />

This instruction provides a hint that the program will<br />

probably soon store into a portion of the block and the<br />

contents of the rest of the block are not meaningful to<br />

the program. The contents of the block are undefined<br />

when the instruction completes. The hint is ignored if<br />

the block is Caching Inhibited.<br />

This instruction is treated as a Store (see Section 3.2)<br />

except that the instruction is treated as a no-op if execution<br />

of the instruction would cause the system data<br />

storage error handler to be invoked.<br />

Let the effective address (EA) be the sum (RA|0)+(RB).<br />

The dcbt instruction provides a hint that describes a<br />

block or data stream, or indicates the expected use<br />

thereof. A hint that the program will probably soon load<br />

from a given storage location is ignored if the location is<br />

Caching Inhibited or, for the Server environment,<br />

Guarded.<br />

The only operation that is “caused” by the dcbt instruction<br />

is the providing of the hint. The actions (if any)<br />

taken by the processor in response to the hint are not<br />

considered to be “caused by” or “associated with” the<br />

dcbt instruction (e.g., dcbt is considered not to cause<br />

any data accesses). No means are provided by which<br />

software can synchronize these actions with the execution<br />

of the instruction stream. For example, these<br />

actions are not ordered by the memory barrier created<br />

by a sync instruction.<br />

The dcbt instruction may complete before the operation<br />

it causes has been performed.<br />

The nature of the hint depends, in part, on the value of<br />

the TH field, as specified below. If TH≠0b1010 this<br />

instruction is treated as a Load (see Section 3.2),<br />

except that the system data storage error handler is not<br />

invoked, and reference and change recording need<br />

not be done.<br />

Special Registers Altered:<br />

None<br />

Extended Mnemonics:<br />

Extended mnemonics are provided for the Data Cache<br />

Block Touch instruction so that it can be coded with the<br />

TH value as the last operand for all categories.<br />

Extended: Equivalent to:<br />

dcbtct RA,RB,TH dcbt for TH values of 0b0000 -<br />

0b0111;<br />

other TH values are invalid.<br />

dcbtds RA,RB,TH dcbt for TH values of 0b0000 or<br />

0b1000 - 0b1010;<br />

other TH values are invalid.<br />

Chapter 3. Storage Control Instructions<br />

353

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