Power ISA™ Version 2.03 - Power.org

Version 2.03
Branch [and Link]
BD24-form
Branch [and Link]
BD8-form
e_b target_addr (LK=0)
e_bl target_addr (LK=1)
30 0 BD24 LK
0 6 7 31
NIA iea CIA + EXTS(BD24 || 0b0)
if LK then LR iea CIA + 4
se_b target_addr (LK=0)
se_bl target_addr (LK=1)
58 0 LK BD8
0 6 7 8 15
NIA iea CIA + EXTS(BD8 || 0b0)
if LK then LR iea CIA + 2
target_addr specifies the branch target address.
The branch target address is the sum of BD24 || 0b0
sign-extended and the address of this instruction, with
the high-order 32 bits of the branch target address set
to 0 in 32-bit mode.
If LK=1 then the effective address of the instruction following
the Branch instruction is placed into the Link
Register.
Special Registers Altered:
LR
(if LK=1)
target_addr specifies the branch target address.
The branch target address is the sum of BD8 || 0b0
sign-extended and the address of this instruction, with
the high-order 32 bits of the branch target address set
to 0 in 32-bit mode.
If LK=1 then the effective address of the instruction following
the Branch instruction is placed into the Link
Register.
Special Registers Altered:
LR
(if LK=1)
Branch Conditional [and Link] BD15-form
e_bc BO32,BI32,target_addr (LK=0)
e_bcl BO32,BI32,target_addr (LK=1)
30 8 BO32 BI32 BD15 LK
0 6 10 12 16 31
if (64-bit mode)
then M 0
else M 32
if BO32 0 then CTR M:63 CTR M:63 - 1
ctr_ok ¬BO32 0 | ((CTR M:63 ≠ 0) ⊕ BO32 1 )
cond_ok BO32 0 | (CR BI32+32 ≡ BO32 1 )
if ctr_ok & cond_ok then
NIA iea (CIA + EXTS(BD15 || 0b0))
else
NIA iea CIA + 4
if LK then LR iea CIA + 4
The BI32 field specifies the Condition Register bit to be
tested. The BO32 field is used to resolve the branch as
described in Figure 18. target_addr specifies the
branch target address.
The branch target address is the sum of BD15 || 0b0
sign-extended and the address of this instruction, with
the high-order 32 bits of the branch target address set
to 0 in 32-bit mode.
If LK=1 then the effective address of the instruction
following the Branch instruction is placed into the Link
Register.
Special Registers Altered:
CTR (if BO32 0 =1)
LR
(if LK=1)
Branch Conditional Short Form BD8-form
se_bc
BO16,BI16,target_addr
28 BO16 BI16 BD8
0 5 6 8 15
cond_ok (CR BI16+32 ≡ BO16)
if cond_ok then
NIA iea CIA + EXTS(BD8 || 0b0)
else NIA iea CIA + 2
The BI16 field specifies the Condition Register bit to be
tested. The BO16 field is used to resolve the branch as
described in Figure 19. target_addr specifies the
branch target address.
The branch target address is the sum of BD8 || 0b0
sign-extended and the address of this instruction, with
the high-order 32 bits of the branch target address set
to 0 in 32-bit mode.
Special Registers Altered:
None
656
Power ISA -- Book VLE