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SE-Power Can Open Handbuch - Afag Handhabungs- und ...

SE-Power Can Open Handbuch - Afag Handhabungs- und ...

SE-Power Can Open Handbuch - Afag Handhabungs- und ...

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#define cob_id_used_by_pdo_tpdo1 (0x180001 + cUINT32 + cRD + cWR }<br />

#define transmission_type_tpdo1 (0x180002 + cUINT8 + cRD + cWR }<br />

#define inhibit_time_tpdo1 (0x180003 + cUINT16 + cRD + cWR }<br />

#define transmit_pdo_parameter_tpdo2 (0x180100 + cUINT8 + cRD }<br />

#define cob_id_used_by_pdo_tpdo2 (0x180101 + cUINT32 + cRD + cWR }<br />

#define transmission_type_tpdo2 (0x180102 + cUINT8 + cRD + cWR }<br />

#define inhibit_time_tpdo2 (0x180103 + cUINT16 + cRD + cWR }<br />

#define transmit_pdo_parameter_tpdo3 (0x180200 + cUINT8 + cRD }<br />

#define cob_id_used_by_pdo_tpdo3 (0x180201 + cUINT32 + cRD + cWR }<br />

#define transmission_type_tpdo3 (0x180202 + cUINT8 + cRD + cWR }<br />

#define inhibit_time_tpdo3 (0x180203 + cUINT16 + cRD + cWR }<br />

#define transmit_pdo_parameter_tpdo4 (0x180300 + cUINT8 + cRD }<br />

#define cob_id_used_by_pdo_tpdo4 (0x180301 + cUINT32 + cRD + cWR }<br />

#define transmission_type_tpdo4 (0x180302 + cUINT8 + cRD + cWR }<br />

#define inhibit_time_tpdo4 (0x180303 + cUINT16 + cRD + cWR }<br />

#define transmit_pdo_mapping_tpdo1 (0x1A0000 + cUINT8 + cRD + cWR }<br />

#define first_mapped_object_tpdo1 (0x1A0001 + cUINT32 + cRD + cWR }<br />

#define second_mapped_object_tpdo1 (0x1A0002 + cUINT32 + cRD + cWR }<br />

#define third_mapped_object_tpdo1 (0x1A0003 + cUINT32 + cRD + cWR }<br />

#define fourth_mapped_object_tpdo1 (0x1A0004 + cUINT32 + cRD + cWR }<br />

#define transmit_pdo_mapping_tpdo2 (0x1A0100 + cUINT8 + cRD + cWR }<br />

#define first_mapped_object_tpdo2 (0x1A0101 + cUINT32 + cRD + cWR }<br />

#define second_mapped_object_tpdo2 (0x1A0102 + cUINT32 + cRD + cWR }<br />

#define third_mapped_object_tpdo2 (0x1A0103 + cUINT32 + cRD + cWR }<br />

#define fourth_mapped_object_tpdo2 (0x1A0104 + cUINT32 + cRD + cWR }<br />

#define transmit_pdo_mapping_tpdo3 (0x1A0200 + cUINT8 + cRD + cWR }<br />

#define first_mapped_object_tpdo3 (0x1A0201 + cUINT32 + cRD + cWR }<br />

#define second_mapped_object_tpdo3 (0x1A0202 + cUINT32 + cRD + cWR }<br />

#define third_mapped_object_tpdo3 (0x1A0203 + cUINT32 + cRD + cWR }<br />

#define fourth_mapped_object_tpdo3 (0x1A0204 + cUINT32 + cRD + cWR }<br />

#define transmit_pdo_mapping_tpdo4 (0x1A0300 + cUINT8 + cRD + cWR }<br />

#define first_mapped_object_tpdo4 (0x1A0301 + cUINT32 + cRD + cWR }<br />

#define second_mapped_object_tpdo4 (0x1A0302 + cUINT32 + cRD + cWR }<br />

#define third_mapped_object_tpdo4 (0x1A0303 + cUINT32 + cRD + cWR }<br />

#define fourth_mapped_object_tpdo4 (0x1A0304 + cUINT32 + cRD + cWR }<br />

#define tpdo1_transmit_mask (0x201400 + cUINT8 + cRD }<br />

#define tpdo1_transmit_mask_low (0x201401 + cINT32 + cRD + cWR }<br />

#define tpdo1_transmit_mask_high (0x201402 + cINT32 + cRD + cWR }<br />

#define tpdo2_transmit_mask (0x201500 + cUINT8 + cRD }<br />

#define tpdo2_transmit_mask_low (0x201501 + cINT32 + cRD + cWR }<br />

#define tpdo2_transmit_mask_high (0x201502 + cINT32 + cRD + cWR }<br />

#define tpdo3_transmit_mask (0x201600 + cUINT8 + cRD }<br />

#define tpdo3_transmit_mask_low (0x201601 + cINT32 + cRD + cWR }<br />

#define tpdo3_transmit_mask_high (0x201602 + cINT32 + cRD + cWR }<br />

#define tpdo4_transmit_mask (0x201700 + cUINT8 + cRD }<br />

#define tpdo4_transmit_mask_low (0x201701 + cINT32 + cRD + cWR }<br />

#define tpdo4_transmit_mask_high (0x201702 + cINT32 + cRD + cWR }<br />

#define position_controller_resolution (0x202000 + cINT32 + cRD + cWR }<br />

#define analog_input_voltage (0x240000 + cUINT8 + cRD }<br />

#define analog_input_voltage_ch_0 (0x240001 + cINT16 + cRD }<br />

#define analog_input_voltage_ch_1 (0x240002 + cINT16 + cRD }<br />

#define analog_input_voltage_ch_2 (0x240003 + cINT16 + cRD }<br />

#define analog_input_offset (0x240100 + cUINT8 + cRD }<br />

#define analog_input_offset_ch_0 (0x240101 + cINT32 + cRD + cWR }<br />

#define analog_input_offset_ch_1 (0x240102 + cINT32 + cRD + cWR }<br />

#define analog_input_offset_ch_2 (0x240103 + cINT32 + cRD + cWR }<br />

#define current_limitation (0x241500 + cINT8 + cRD }<br />

#define limit_current_input_channel (0x241501 + cINT8 + cRD + cWR }<br />

#define limit_current (0x241502 + cINT32 + cRD + cWR }<br />

#define error_code (0x603F00 + cUINT16 + cRD + cPDO }<br />

#define controlword (0x604000 + cUINT16 + cRD + cWR + cPDO }<br />

#define statusword (0x604100 + cUINT16 + cRD + cPDO }<br />

#define pole_number (0x604D00 + cUINT8 + cRD + cWR + cPDO }<br />

#define quick_stop_option_code (0x605A00 + cINT16 + cRD + cWR }<br />

#define shutdown_option_code (0x605B00 + cINT16 + cRD + cWR }<br />

#define disable_operation_option_code (0x605C00 + cINT16 + cRD + cWR }<br />

#define stop_option_code (0x605D00 + cINT16 + cRD + cWR }<br />

#define fault_reaction_option_code (0x605E00 + cINT16 + cRD + cWR }<br />

#define modes_of_operation (0x606000 + cINT8 + cWR + cPDO }<br />

#define modes_of_operation_display (0x606100 + cINT8 + cRD + cPDO }<br />

#define position_demand_value (0x606200 + cINT32 + cRD + cPDO }<br />

<strong>SE</strong>-<strong>Power</strong>- BA 12 de. 27.11.07 167

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