SE-Power Can Open Handbuch - Afag Handhabungs- und ...
SE-Power Can Open Handbuch - Afag Handhabungs- und ...
SE-Power Can Open Handbuch - Afag Handhabungs- und ...
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#define homing_acceleration (0x609A00 + cUINT32 + cRD + cWR + cPDO }<br />
#define interpolation_submode_select (0x60C000 + cINT16 + cRD + cWR + cPDO }<br />
#define interpolation_data_record (0x60C100 + cUINT8 + cRD }<br />
#define ip_data_position (0x60C101 + cINT32 + cRD + cWR + cPDO }<br />
#define ip_data_controlword (0x60C102 + cUINT8 + cRD + cWR + cPDO }<br />
#define interpolation_time_period (0x60C200 + cUINT8 + cRD }<br />
#define ip_time_units (0x60C201 + cUINT8 + cRD + cWR + cPDO }<br />
#define ip_time_index (0x60C202 + cINT8 + cRD + cWR + cPDO }<br />
#define interpolation_sync_definition (0x60C300 + cUINT8 + cRD }<br />
#define syncronize_on_group (0x60C301 + cUINT8 + cRD + cWR + cPDO }<br />
#define ip_sync_every_n_event (0x60C302 + cUINT8 + cRD + cWR + cPDO }<br />
#define interpolation_data_configuration (0x60C400 + cUINT8 + cRD + cPDO }<br />
#define max_buffer_size (0x60C401 + cUINT32 + cRD + cPDO }<br />
#define actual_size (0x60C402 + cUINT32 + cRD + cWR + cPDO }<br />
#define buffer_organisation (0x60C403 + cUINT8 + cRD + cWR + cPDO }<br />
#define buffer_position (0x60C404 + cUINT16 + cRD + cWR + cPDO }<br />
#define size_of_data_record (0x60C405 + cUINT8 + cWR + cPDO }<br />
#define buffer_clear (0x60C406 + cUINT8 + cWR + cPDO }<br />
#define torque_control_parameters (0x60F600 + cUINT8 + cRD }<br />
#define torque_control_gain (0x60F601 + cUINT16 + cRD + cWR }<br />
#define torque_control_time (0x60F602 + cUINT16 + cRD + cWR }<br />
#define velocity_control_parameter_set (0x60F900 + cUINT8 + cRD }<br />
#define velocity_control_gain (0x60F901 + cUINT16 + cRD + cWR }<br />
#define velocity_control_time (0x60F902 + cUINT16 + cRD + cWR }<br />
#define velocity_control_filter_time (0x60F904 + cUINT16 + cRD + cWR }<br />
#define control_effort (0x60FA00 + cINT32 + cRD + cPDO }<br />
#define position_control_parameter_set (0x60FB00 + cUINT8 + cRD }<br />
#define position_control_gain (0x60FB01 + cUINT16 + cRD + cWR }<br />
#define position_control_time (0x60FB02 + cUINT16 + cRD + cWR }<br />
#define position_control_v_max (0x60FB04 + cUINT32 + cRD + cWR }<br />
#define position_error_tolerance_window (0x60FB05 + cUINT32 + cRD + cWR }<br />
#define digital_inputs (0x60FD00 + cUINT32 + cRD + cPDO }<br />
#define digital_outputs (0x60FE00 + cUINT8 + cRD }<br />
#define digital_outputs_data (0x60FE01 + cUINT32 + cRD + cWR + cPDO }<br />
#define digital_outputs_mask (0x60FE02 + cUINT32 + cRD + cWR + cPDO }<br />
#define target_velocity (0x60FF00 + cINT32 + cRD + cWR + cPDO }<br />
#define motor_type (0x640200 + cUINT16 + cRD + cPDO }<br />
#define motor_data (0x641000 + cUINT8 + cRD }<br />
#define iit_time_motor (0x641003 + cUINT16 + cRD + cWR }<br />
#define iit_ratio_motor (0x641004 + cUINT16 + cRD }<br />
#define phase_order (0x641010 + cUINT16 + cRD + cWR }<br />
#define encoder_offset_angle (0x641011 + cINT16 + cRD + cWR + cPDO }<br />
#define motor_temperatur_sensor_polarity (0x641014 + cINT16 + cRD + cWR + cPDO }<br />
#define supported_drive_modes (0x650200 + cUINT32 + cRD + cPDO }<br />
#define drive_data (0x651000 + cUINT8 + cRD }<br />
#define serial_number (0x651001 + cUINT32 + cRD }<br />
#define drive_code (0x651002 + cUINT32 + cRD }<br />
#define user_variable_not_saved (0x651003 + cINT16 + cRD + cWR }<br />
#define user_variable_saved (0x651004 + cINT16 + cRD + cWR }<br />
#define enable_logic (0x651010 + cUINT16 + cRD + cWR }<br />
#define limit_switch_polarity (0x651011 + cINT16 + cRD + cWR }<br />
#define homing_switch_selector (0x651013 + cINT16 + cRD + cWR }<br />
#define homing_switch_polarity (0x651014 + cINT16 + cRD + cWR }<br />
#define limit_switch_deceleration (0x651015 + cINT32 + cRD + cWR }<br />
#define brake_delay_time (0x651018 + cUINT16 + cRD + cWR }<br />
#define automatic_brake_delay (0x651019 + cUINT16 + cRD + cWR }<br />
#define position_error_switch_off_limit (0x651022 + cUINT32 + cRD + cWR }<br />
#define pwm_frequency (0x651030 + cUINT16 + cRD + cWR }<br />
#define power_stage_temperature (0x651031 + cINT16 + cRD }<br />
#define max_power_stage_temperature (0x651032 + cINT16 + cRD }<br />
#define nominal_dc_link_circuit_voltage (0x651033 + cUINT32 + cRD }<br />
#define actual_dc_link_circuit_voltage (0x651034 + cUINT32 + cRD }<br />
#define max_dc_link_circuit_voltage (0x651035 + cUINT32 + cRD }<br />
#define min_dc_link_circuit_voltage (0x651036 + cUINT32 + cRD + cWR }<br />
#define enable_dc_link_<strong>und</strong>ervoltage_error (0x651037 + cUINT16 + cRD + cWR }<br />
#define iit_error_enable (0x651038 + cUINT16 + cRD + cWR }<br />
#define enable_enhanced_modulation (0x65103A + cUINT16 + cRD + cWR }<br />
#define iit_ratio_servo (0x65103D + cINT16 + cRD }<br />
#define nominal_current (0x651040 + cUINT32 + cRD }<br />
#define peak_current (0x651041 + cUINT32 + cRD }<br />
#define drive_serial_number (0x6510A0 + cUINT32 + cRD }<br />
<strong>SE</strong>-<strong>Power</strong>- BA 12 de. 27.11.07 169
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