of Microprocessors

MICROPROCESSORS 155
1 million bytes/sec is available for dynamic memory refresh, DMA displays,
and other uses without any effect on the microprocessor at all. Most other
microprocessors would be stopped cold using conventional DMA techniques
at this speed. Even another 6502 may be connected to the same bus with
oppositely phased clocking (external clock operation would be required) for a
dual-processor system. Clearly, then, the 6502 bus is actually one ofthe most
flexible available.
Interrupts
Interrupts on the 6502 at first seem somewhat limited but on closer
examination are seen to be extremely flexible. Two priority levels of interrupt
are built in, the standard maskable (can be disabled by program instructions)
interrupt and a nonmaskable interrupt, which has a higher priority. The
maskable interrupt request line into the 6502 is level sensitive and will
continue to interrupt the CPU as long as it is enabled and active. Unwanted
multiple interrupts are prevented, however, because the CPU disables them
after the interrupt sequence until the program enables them again. The
nonmaskable interrupt is edge sensitive. Whenever the logic level at this
input goes from high to low, the nonmaskable interrupt sequence is
unconditionally executed. These two different interrupt actions are very
useful in logic replacement applications and in fact avoid a serious problem 4
the 8080 has in general-purpose applications.
The interrupt sequence itself consists of executing a "jump to subroutine
indirect" through dedicated addresses in high memory. These addresses
are called vectors and are FFFC-FFFD (hexadecimal notation) for maskable
and FFFE and FFFF for nonmaskable interrupts. Any number of vectored
interrupt levels may be implemented for each interrupt type by having
the interrupting device respond to read cycles at those addresses with the
address of the service routine.
Registers
The 6502 has possibly fewer bits of on-chip registers than any other
microprocessor. Besides the program counter, there is an 8-bit accumulator
and two 8-bit index regIsters. The stack pointer is also 8 bits and the stack is
thus limited to 256 bytes and is always in Page 1. The status register has the
usual negative, carry, and zero flags but also has overflow, interrupt disable,
and decimal mode flags. When the decimal mode flag is on, the arithmetic
instructions assume two-digit BCD data. As we will see later, what is
lacking in register count is made up double in memory-addressing flexibility.
4 If an 8080 program gets caught in a loop with the interrupt disabled, it is impossible
to interrupt the program and return to the monitor. Reset is the only way our, which
destroys the program counter and other registers, making straightforward isolation of
the loop impossible.