of Microprocessors

166 MUSICAL ApPLICATIONS OF MICROPROCESSORS
as floating-point math. For now, the subroutine that services the emulator
instructions can decode and "execute" them in software. Beyond these, there
are 16 more trap instructions, each with its own interrupt vector. The traps
are typically used to call operating system routines (as many as 16) without
the user program needing to know where in memory the routines are stored.
Finally, there is a trace interrupt that is generated after evety instruction
execution ifthe trace bit is on in the status register. This feature makes it very
easy to implement software tracing of program execution.
There are eight separate interrupt priority levels in the 68000. The
highest are internally generated and external hardware error indications that
cannot be disabled. The other seven levels are normal I/O-type interrupts. A
3-bit level number in the status register determines which levels are allowed
to generate interrupts. When this register contains seven, all I/O interrupts
except Level 7 are inhibited. When it contains lower numbers, lower level
interrupts are allowed. A zero level number allows all interrupts. When an
interrupt is recognized, the current level number in the status register is
changed to match the level number being serviced, thus inhibiting further
interrupts on that or a lower level. Higher-priority interrupts, however, can
still interrupt the lower-priority service routine, thus providing a true
multilevel nested operation.
I/O interrupt hardware can be either simple or complex. For a simple
system, the 68000 can be instructed to generate a vector number based on
the priority level being serviced, thus providing up to seven possible
interrupt sources. This autovector mode is activated by driving the VPA signal
during interrupt acknowledge bus cycles. Using this approach does not
preclude having multiple interrupt sources on each level, but then the level
service routine would have to poll devices on its level to determine which was
interrupting. With more complex hardware, each interrupting device can
drive a unique 8-bit vector number onto the data bus during interrupt
acknowledge bus cycles. This would provide for direct, automatic entry into
each device's service subroutine with no polling or status testing necessary.
Registers
Whereas the 6502 offers a spartan set of four working registers but very
flexible memory addressing to compensate, the 68000 offers the most
registers coupled with the most useful addressing modes. There are in fact
eight data registers and eight address registers, each ofwhich is a full 32 bits in
length. All eight of the data registers (DO-D7) and seven of the address
registers (AO-A6) can be used however the program sees fit. Address Register
7 is normally reserved as a stack pointer, since the interrupt, subroutine
linkage, and privilege hardware assume that. There are, in fact, two A7
registers, one for Supervisor Mode and one for User Mode. The present
privilege mode selects which one is active. Actually, any of the address