of Microprocessors

DIGITAL-TO-ANALOG AND ANALOG-TO-DIGITAL CONVERTERS 233
I
2R t
MSB LSB lout
V ref
R
MSB ! 0 0 0 0
0
0 0 1 1/8 Vre/lr
2R v ou! 0 1 0 1/4 Vre/r
0 1 1 3/8 Vre/lr
1 0 0 1/2 Vrer/r
R
1 0 1 5/8 V re1 /r
2R
1 1 0 3/4 V re1 /r
LSB 1 1 1 718 V re1 /r
2R
Fig. 7-7. Inverted current ladder DAC
7-6 and note that, as drawn, the digital code essentially interpolates between
ground and the reference voltage according to the binary fraction operating
the switches. In fact, the circuit will interpolate between any two voltages if
the ground terminal is freed and connected insread to the second voltage.
Figure 7-8 shows a 3-bit example, in which the lower ladder terminal is
connected to + 1 V and the upper terminal is connected to + 2 V. The 3-bit
digital code then selects eight voltage levels YSV apart starting at and
including the voltage at the lower ladder terminal (+ I V) and ending one step
short of the voltage at the upper ladder terminal (+2 - Ys V).
To form a segmented DAC, a modified resistor string DAC is first
constructed using two sets of switches so that two output voltages are
produced, the second always one step higher than the first (Fig. 7-9). These
voltages are then buffered by op-amps and applied to the ends of a resistor
ladder DAC, which in turn interpolates the large step into much smaller
ones. The most significant bits of the digital code drive the resistor string
DAC, while the remaining less significant bits drive the resistor ladder DAC.
Vrefh =+2.0 V.
Vrefl = +1.0 V.
1
t MSB 2R Vout
R MSB LSB Vout
2R I I I I.B75
1 I 0 I. 750
I 0 I 1.625
I 0 0 1.500
2R
0 I 1 1.375
+LSB
0 I 0 1.250
2R
0 o 0 I 1.125
o 0 0 1.000
Fig. 7-8. Ladder DAC interpolating between +1 and + 2 V