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DIGITAL-TO-ANALOG AND ANALOG-TO-DIGITAL CONVERSION 371<br />

Sign-Magnitude Coding<br />

Looking again at the curves in Fig. 12-2, it is seen that the maximum<br />

SiN ratio <strong>of</strong> 96 dB for a 16-bit DAC occurs right at the point <strong>of</strong> overload. In<br />

a real listening situation, this would correspond to the peak <strong>of</strong> the loudest<br />

crescendo in the piece. At the ear-shattering volume this might represent,<br />

one is highly unlikely to notice a noise level scarcely louder than a heartbeat.<br />

On the other hand, duting extremely quiet passages when the noise would be<br />

noticed most, the noise level remains unchanged meaning that the SiN ratio<br />

has degraded.<br />

It would be nice ifsome <strong>of</strong> the excess SiN at high signal levels could be<br />

traded <strong>of</strong>f for a cheaper DAC without affecting or even improving the SiN at<br />

lower signal levels. This, in fact, is possible and can be accomplished in at<br />

least three different ways.<br />

Although not specifically mentioned previously, an audio DAC must<br />

be connected so that both positive and negative voltages can be produced.<br />

Normally, this is accomplished by <strong>of</strong>fset binary coding and shifting the<br />

normally unipolar DAC output down by exactly one-half <strong>of</strong> full scale. In<br />

audio applications, a de blocking capacitor is sufficient for the level shifting.<br />

Low signal levels imply that the net DAC output hovers around zero.<br />

An <strong>of</strong>fset binary DAC, however, sees this as one-half scale. In Chapter 7, it<br />

was determined that the most significant bit <strong>of</strong> the DAC had the greatest<br />

accuracy requirement; therefore, it is logical to assume that the greatest<br />

linearity error would occur when the MSB switches. Unfortunately, this<br />

occurs at half scale also so this kind <strong>of</strong> DAC imperfection would directly<br />

subtract from the SiN ratio at low signal levels as well as high. Thus, with<br />

<strong>of</strong>fset binary coding, one must use a highly linear DAC.<br />

The sign-magnitude method <strong>of</strong> obtaining a bipolar DAC output does<br />

not suffer from this problem. Using the basic circuit configuration that was<br />

shown in Fig. 7-17, small signal levels will only exercise the lesser<br />

significant DAC bits, thus eliminating the noise caused by errors in the most<br />

significant bits. As a side effect, the sign-bit amplifier provides the<br />

equivalent <strong>of</strong> one additional bit <strong>of</strong> resolution making a 16-bit DAC act like a<br />

17-bitter!<br />

The significance <strong>of</strong> all this is that inexpensive DACs with 16 bits <strong>of</strong><br />

resolution but only 13 or so bits <strong>of</strong> linearity are available. When linearity is<br />

less than resolution it means that the most significant bits are <strong>of</strong>f enough to<br />

make the DAC nonlinear at the points where the affected bits change. A<br />

16-bit DAC with 13-bit linearity could have nearly an eight-step gap or<br />

backtrack right at 1/2 scale, lesser errors at 1/4 and 3/4 scale, and an even<br />

smaller error at 1/8, 3/8, 5/8, and 718 scale. If connected in an <strong>of</strong>fset binary<br />

circuit, it would perform no better than a 13-bit DAC. But when connected<br />

in a sign-magnitude circuit, we have just the trade<strong>of</strong>f that we have been<br />

looking for as the curve in Fig. 12-3 shows.

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