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160 MUSICAL ApPLICATIONS OF MICROPROCESSORS<br />

The 68000 family is actually available in four different configurations<br />

and three different clock speeds. The "standard" 68000, upon which this<br />

discussion is based, comes in a very large 64-lead dual-in-line package that<br />

measures about 1 inch X 3.5 inches. This version has a separate 16-bit data<br />

bus and 24-bit address bus that together account for 40 <strong>of</strong> those pins. The<br />

68008 is an 8-bit data bus version with 20 address lines (1M byte addressing<br />

range) that fits into a more petite 40-lead package. It is absolutely<br />

instruction-set-compatible with the standard 68000 but costs substantially<br />

less (under $20) and runs about 60% as fast. The 68010 is essentially the<br />

same as the 68000 but has hardware enhancements that are valuable in<br />

multiuser applications. Due to more efficient internal operation, it is slightly<br />

faster for most programming as well but costs twice as I?uch as a 68000. The<br />

standard clock speed for these three versions is 8 MHz, although 10 MHz and<br />

12.5 MHz are available at extra cost and 16 MHz may ultimately become<br />

available.<br />

The 68020 is the newest family member with a full 32-bit data bus and<br />

separate 32-bit address bus. That gives it a linear, unsegmented addressing<br />

range <strong>of</strong> more than 4 gigabytes! It is packaged in a small, difficult-to-use,<br />

1l2-lead "pin grid array" that is less than 1.5 inch square. Because <strong>of</strong> the 32­<br />

bit data bus and incredibly efficient internal operation, it is 3 to 10 times<br />

faster than the 68000, particularly for short loops, common in most direct<br />

synthesis algorithms. The standard clock speed is projected to be 16 MHz. It<br />

is interesting to note that the initial price <strong>of</strong> $487 is actually less than the<br />

8080's initial price <strong>of</strong> $360 in 1974 if inflation is taken into account.<br />

Bus Structure and Timing<br />

The 68000 is really a 32-bit microprocessor with a 16-bit data bus.<br />

Only 24 <strong>of</strong> the potential 32 address bits are available externally, and 32-bit<br />

operands are transferred 16 bits at a time. All addresses are byte addresses,<br />

which makes byte manipulation s<strong>of</strong>tware easy. Since the registers and data<br />

bus are more than 1 byte wide, a property known as "byte sex" becomes<br />

important. In essence, this specifies how multiple byte operands such as 16­<br />

and 32-bit numbers are stored in memory. The 68000 uses positive byte sex in<br />

which the most significant bytes (leftmost in registers) are stored at lower<br />

byte addresses. Thus, reading values from a memory dump listing is easy<br />

because they are listed in the same order one would write them on paper or<br />

visualize them in registers. The address <strong>of</strong> a 2- or 4-byte operand is the<br />

address <strong>of</strong> its most significant byte, which in the 68000 must always be even.<br />

In order to simplify hardware handling <strong>of</strong> individual 8-bit bytes on a<br />

16-bit data bus, the lowest address line on the 68000 is replaced by a lower<br />

data strobe line and an upper data srrobe line. For 16-bit (word) transfers,<br />

both strobes are activated, whereas for byte transfers, only one is pulsed:<br />

upper for even addresses and lower for odd addresses.

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