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Musical-Applications-of-Microprocessors-2ed-Chamberlin-H-1987

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DIGITAL HARDWARE 619<br />

effective frequency <strong>of</strong> that harmonic will be increased somewhat. Although<br />

the magnitude <strong>of</strong> frequency shift is restricted to a few hertz, the technique is<br />

useful in simulating a real vibrating string with slightly sharp upper harmonICS.<br />

An Intelligent Oscillator?<br />

The best method <strong>of</strong> interfacing either <strong>of</strong> the previously described oscillators<br />

to a system is the use <strong>of</strong> a dedicated microprocessor. Actually operating<br />

such an oscillator bank with frequency glides and dynamic waveform changes<br />

to worry about, not to mention other modules in the system such as<br />

amplifiers and filters, may pose a very heavy load on the control computer. It<br />

would be much nicer if the oscillator bank could be given high-level com':<br />

mands such as "increase frequency <strong>of</strong> channel 7 from C4 to G4 linearly over a<br />

period <strong>of</strong> 300 msec starting at time point 1230," or "change the harmonic<br />

content smoothly from what it is currently to the following specification over<br />

the next 150 msec."<br />

A dedicated processor to perform such functions would actually add<br />

very little to the module cost. Two-thousand bytes <strong>of</strong> program ROM should<br />

be sufficient for a moderately sophisticated command interpreter. Read/write<br />

memory is only necessary for miscellaneous programming use and the storage<br />

<strong>of</strong> parameters; thus, it can be 256 or at most lK bytes in size. Memory and<br />

I/O interfacing would involve abour five additional ICs. A simple logic<br />

replacement microprocessor such as a 6502 suffices quite well for the intelligence.<br />

The net result is that less than $50 worth <strong>of</strong> extra parts can be added<br />

to make an intelligent oscillator.<br />

Speaking <strong>of</strong> the 6502 microprocessor, the observant reader may have<br />

noticed that the 16-channel multiplexed oscillator timing diagram exactly<br />

parallels the 6502's bus timing. In fact, one could drive the 6502 clock with<br />

the internal/external address selector signal. Since the 6502 does nothing<br />

during the first half <strong>of</strong> its I-JLsec bus cycle, that half would be the oscillator's<br />

internal half cycle. The external half cycle would be devoted to the microprocessor,<br />

which could then directly write into the frequency and<br />

waveform memories. In fact, with some attention to detail, these memories<br />

could appear to the micro as regular read/write memory and thereby eliminate<br />

interface ports and registers altogether!<br />

Communication between the control computer and the oscillator can<br />

now be more casual. This allows techniques such as serial asychronous (RS­<br />

232),3 which are normally useless in real-time control applications, to be<br />

effectively utilized. In turn, this means that digital modules can be designed<br />

3This is the method most <strong>of</strong>ten used to talk to "normal" peripherals such as terminals,<br />

printers, etc. It is a serial by bit technique that is inherently slow (compared with<br />

microprocessor speed) and usually implemented with little or no busy/done feedback<br />

or error checking. Its main virtue is standardization and minimal wiring complexity<br />

(3 wires are sufficient for bidirectional communication).

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