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226 MUSICAL ApPLICATIONS OF MICROPROCESSORS<br />

Duty-Cycle Modulation<br />

Probably the simplest and inherently most accurate conversion method<br />

is based on pulse-width or duty-cycle modulation. The fundamental concept<br />

is to generate a rectangular waveform with very precisely controlled voltage<br />

levels and transition points. This waveform is then sent through a low-pass<br />

filter, which effectively takes the long-term average voltage level <strong>of</strong> the wave<br />

and outputs it as a dc voltage level. Actually, the beauty <strong>of</strong> the technique is<br />

that the voltage levels are fixed so the on-<strong>of</strong>f times are the only variable.<br />

Thus, the scheme is really one <strong>of</strong> digital-to-time conversion followed by<br />

time-to-analog conversion.<br />

Figure 7-3 illustrates the operation <strong>of</strong> a duty-cycle DAC. At integral<br />

multiples <strong>of</strong> T, the analog switch is flipped upward, which connects the<br />

low-pass filter to the reference voltage source. A variable time (less than T)<br />

later, the switch is flipped back down, which sends zero to the filter. In the<br />

example, the filter sees Vre/ for 25% <strong>of</strong> the time and zero for the remaining<br />

75%. The time average then is 0.25Vref, which is output by the filter and<br />

load isolating unity gain buffer. This method (and most <strong>of</strong> the others that<br />

will be studied) gives a multiplying DAC because the output voltage is proportional<br />

to the product <strong>of</strong> a reference voltage and the digital input expressed<br />

as a binary fraction.<br />

A simple digital counter can be used to control the analog switch in<br />

response to a digital input. At the beginning <strong>of</strong> a T interval, the counter<br />

would be preset to the digital value to be converted. A stable, highfrequency<br />

clock causes the counter to count down toward zero. As long as the<br />

counter is nonzero, the switch would be up, but as soon as it reaches zero, the<br />

switch would be thrown down until the next cycle.<br />

For high conversion speed, the frequency <strong>of</strong> the clock should be as high<br />

as possible but not so high that analog switching time becomes a major<br />

portion <strong>of</strong> a clock cycle. A realistic figure might be 10 MHz. The frequency<br />

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