of Microprocessors

156 MUSICAL ApPLICATIONS OF MICROPROCESSORS
6502 instructions may be either one, two, or three bytes in length. The
first byte is always the op code and the second and third bytes, ifpresent, are
either immediate operands or addresses. The first 256 bytes of memory
(OOOO-OOFF) are termed the base page and can be addressed by many instructions
with a single address byte. However, the base page is indispensable for
most programming and is not merely a convenient way to save on memory.
The 6502 CPU is unusually efficient in executing instructions. Many
require only as many machine cycles as memory cycles and nearly all of the
remainder require only one extra cycle. Average execution speed may often
exceed 350,000 instructions/sec due in part to extremely fast conditional
jumps (2.5 f.Lsec average) and immediate mode instructions (2 f.Lsec). For
even higher speed, selected CPUs wi th clock frequencies as high as 4.°MHz
are available, which can approach speeds of 1.5 million instructions/sec
(MIPS) when combined with bipolar memory.
Addressing Modes
Like most minicomputers, the strength of the 6502 is its memoryaddressing
modes. Easy access to memory and a number of in-memory
operations reduce the need for registers. Although the manufacturer boasts
13 addressing modes, only 10 are sufficiently differentiated to be listed here:
1. Register, the operand is the designated register.
2. Immediate, the operand is the byte following the instruction.
3. Relative, the operand address is formed by adding the following byte to
the location counter (signed add). Used only by conditional branch
instructions.
4. Zero page, the address of the operand is contained in the single following
byte.
5. Absolute, the address of the operand is contained in the two following
bytes.
6. Zero page indexed, the address of the operand is formed by adding the
following byte to the specified index register discarding the carry if
any.
7. Absolute indexed, the address of the operand is formed by adding the
following two bytes to the specified index register (unsigned add).
8. Indirect, the address of a byte pair containing the address of the
operand is in the following two bytes. Used only by the unconditional
branch instruction.
9. Indexed indirect, the zero page indexed sequence is used to locate a
byte pair on the base page containing the address of the operand.
10. Indirect indexed, the second byte of the instruction points to a byte
pair on the base page, which is added to the Y index register (unsigned
add) to form the address of the operand.