of Microprocessors

594 MUSICAL ApPLICATIONS OF MICROPROCESSORS
RATE MULT OUT I II I III III III III III III III III III III III III
+ 2 FILTER OUT ..L1--'_"--..1--'_"------'----'------'---'---'--------'_"----..L-L..-L.-...I.-----'----'----'----'--'-_.L-..L.-
+ 4 FILTER OUT ..11~-"---------'-----'-----'------'----.L--"-------'--- __--'-----'----'--
+ 8 FILTER OUT --'- --'- ---' ---L- ----L --'-- _
Fig. 17-4. Operation of jitter filter for rate multiplier
M bits that just continuously counts through its 2M possible states. The
gating network compares the content of the counter with the frequency
control word and based on the comparison either allows a clock pulse through
or blocks it. The average output frequency is equal to FN/2 M , where F is the
clock frequency and M and N are as before. Note that unlike the divide-by-N
approach, the rate multiplier produces an output frequency directly proportional
to N rather than inversely proportional. Note also that by increasing
the number of counter bits that the frequency resolution may be made as
high as desired without altering the clock frequency.
So far this sounds ideal but there is a catch. Examining the gating
structure and truth table for N = 11, it is seen that the output pulses are
erratically spaced, although there are indeed 11 of them per 16 input pulses.
A little further study of the effect of different Ns reveals that the instantaneous
output frequency never varies over a range greater than two to one, although
it is never less than that either unless N is a power of two, in which case it
does not vary at all. The audible effect of such frequency jitter is a very rough
sound to say the least. Thus, it is clear that a rate multiplier alone is
unsuitable as an audio tone source.
One can, however, "digitally filter" the jittery output with a simple
binary counter and reduce the percentage of frequency modulation. Figure
17-4 shows how a divide-by-8 counter smooths the frequency jitter substantially
from 100% to about 12%. Unfortunately, the clock frequency must be
increased by a factor of8 to compensate for the frequency division of the jitter
filter. By adding stages to the filter counter, the jitter may be made as small
as desired, subject only to the clock-frequency limit of the rate-multiplier
counter. A divide-by-256 filter counter, which leaves only a trace of roughness
in the sound, is probably adequate in most cases. Thus, if the rate
multiplier is to be used to produce frequencies up to 20 kHz, the clock
frequency must be 5.12 MHz, about what it was with the divide-by-N
approach.
With an overall output frequency relation of FN/2 M +], where} is the
number of bits in the jitter filter, it is seen that frequency is a linear function
of the digital word, N. Thus, frequency resolurion is poorest at low frequencies
rather than at high frequencies. If one wishes to experiment with rate
multipliers, the 7497 is a 6-bit cascadable unit that functions up to 20 MHz.
Four of these, an 8-bit filter counter (74393), and a 5-MHz crystal oscillator
are sufficient to build a frequency soutce with good resolution at all but the
very lowest audio frequencies (1. 5% at 20 Hz).