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Musical-Applications-of-Microprocessors-2ed-Chamberlin-H-1987

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DIGITAL-TO-ANALOG AND ANALOG-TO-DIGITAL CONVERTERS 243<br />

GAIN TRIM<br />

CURRENT<br />

INPUT<br />

FROM<br />

CURRENT<br />

OUTPUT<br />

DAC<br />

R2<br />

OFFSET<br />

TRIM<br />

Fig. 7-15. Fast, inexpensive current-to-voltage converter<br />

resulting fractional volt signal to standard levels with good speed, since less<br />

frequency compensation is needed. Noise pickup could be a problem,<br />

though, if this technique is used with high-resolution DACs.<br />

The current-to-voltage converter configuration shown in Fig. 7-15 is<br />

probably the best, really inexpensive circuit available for most applications <strong>of</strong><br />

current-output DACs. The "three-for-a-dollar" LM301 op-amp using feedforward<br />

compensation easily gives under 3-f-tsec settling times, normally<br />

obtainable only with more costly "high-speed" op-amps. Although the effective<br />

zero impedance <strong>of</strong> the amplifier summing node eliminates output capacitance<br />

slowdown, in practice C1 is usually needed to keep the DAC output<br />

capacitance from making the op-amp unstable. Gain and <strong>of</strong>fset errors are also<br />

easily trimmed out in this circuit because the adjustments do not interact.<br />

Some types <strong>of</strong> CMOS DACs are affected by output amplifier bias current,<br />

which is approximately 100 nA for the LM301. FET-type op-amps, such as<br />

the LF356, are then required and C1 is mandatory with a value in the 10-30<br />

pF range. These also require that the amplifier's own <strong>of</strong>fset be trimmed to<br />

zero in order to minimize differential linearity errors.<br />

Number Coding<br />

Several different binary codes are in common use with DACs. All <strong>of</strong> the<br />

example circuits given previously were unipolar, that is, gave output voltages<br />

between zero and a Vref or output currents between zero and Iref. One<br />

way to obtain a bipolar voltage output would be to use the dual emitterfollower<br />

bipolar transistor switch shown in Fig.7-12 with a bipolar reference<br />

supply. The result would be a voltage output DAC that would swing between<br />

- Vref and + Vref- 1LSB (switches connected to R-2R ladder). For<br />

example, all zeroes would give - Vref, 10000 ... would give zero volts, and<br />

11111 . . . would give one step less than + Vref. Such a code is called <strong>of</strong>fset<br />

binary because it is equivalent to a plain unsigned binary (positive output<br />

only) DAC output between zero and +2Vre!shifted down by Vrefas in Fig.

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