of Microprocessors

MUSIC SYNTHESIS SOFTWARE 657
0199 10E6 45BO
0200 10E8 85B3
0201 10EA A5BO
0202 10EC 1003
0203 10EE 202E10
0204 10F1 A5B2 SDIV1
0205 10F3 1005
0206 10F5 49FF
0207 10F7 18
0208 10F8 6901
0209 10FA 206B1D SDIV2
0210 10FD A5B3
0211 10FF 1008
0212 1101 A5B1
0213 1103 49FF
0214 1105 85B1
0215 1107 E6B1
0216 1109 60 SDIV3
0217 110A
o ERRORS IN PASS 2
EOR ACCH COMPUTE SIGN OF QUOTIENT
STA TEMP2 SAVE THE SIGN UNTIL LATER
LOA ACCH TEST SIGN OF DIVIDEND
BPL SOIV1 SKIP IF POSITIVE
JSR DNEG TWOS COMPLEMENT DIVIDEND IF NEGATI VE
LDA TEMPI TEST SIGN OF DIVISOR
BPL SOIV2 JUMP IF POSITIVE
EOR #$FF TWOS COMPLEMENT DIVISOR IF NEGATIVE
CLC
ADC #1
JSR UDIV 00 THE OIVISON
LOA TEMP2 TEST DESIRED SIGN OF OUOTIENT
BPL SOIV3 GO RETURN IF SHOULD BE POSITIVE
LOA ACCL TWOS COMPLEMENT QUOTIENT IF SHOULD BE
EOR #$FF NEGATIVE
STA ACCL
INC ACCL
RTS
RETURN
Fig. 18--3. Signal-processing math package for the 6502 (cont.).
The shift routines do one shift at a time, again using the carry flag to
transfer bits from one byte to the other. Note that when shifting right the
left byte is shifted first, whereas when shifting left the tight byte is shifted
first. A fair amount of fooling around is necessary to duplicate the sign bit
when doing a signed shift right. A machine with decent arithmetic capability
would explicitly provide a shift with sign-extend instruction. Note that
the ability of the 6502 to directly modify memory greatly simplifies many
operations on the pseudoaccumulator.
The basic multiplication subroutine handles two 8-bit unsigned numbers
and produces a 16-bit unsigned product. While most computer users
know that the proper way to multiply involves shifting and adding, the
number of inefficient (or just plain incorrect) multiply subroutines that have
been published (Ie manufacturers are the worst offenders) indicates a general
lack of understanding in this area. Minicomputer designers of the 1960s,
,-------_-------.f"L----
PRODUCT
SHIFT ENTIRE REGISTER AND CARRỴ.
MUL flPLIER
________
0-1 1 ! ! ! ! ! ! i 1; 111-1)
~~~~tPLIER
I I BIT IS A ONE
I I I I I I I
MULTIPLICAND
I
MULTIPLIER
BITS
Fig. 18--4. Shift-and-add multiplication