of Microprocessors

596 MUSICAL ApPLICATIONS OF MICROPROCESSORS
N
-c_L
74161
00 ~OIVIOEO
UTPUT
ClK
OC
10
[7
CET OB
CEP OA
-----3.
0
~B3 CO QQ ~
~ B2
L3 15 13 0 00
~ 81 OC ~
~ BO ZZ2 12 C oc
MS8 7483A 74/75 OB ~
,,~ ~B OS
I
A3
3 A2 OA ~
-- ~ AI L0 9 4 A QA
10 AD
CI
~ ClK
~ B3
B2
~
13
1
14
CO
00 ~
15 13 0 Q5
L3
v-!---2- BI ~ I~
2
~ BO L2
12 C OC
7483A 74175 OB ~
1 6 5
A3 LI
B OS
3 A2 OA ~
--~ AI L0 9 4 A OA
LSB
10 A0 9 >--- ClK
Cl
J3
MASTER
CLOCK
Fig. 17-6. Experimental accumulator divider
As an example, let's assume that an oscillator with I-cent (0.06%)
resolution over a 20-Hz to 20-kHz frequency range and inaudible jitter is
desired. Under normal conditions, 0.5% frequency shift is about the
minimum audible for single tones of moderate frequency. It is reasonable to
assume that this much jitter at 20 kHz would be completely inaudible, while
at midfrequencies the jitter is far less anyway. At 1 kHz, for example, it
would be a mere 0.025%, which is much lower than the wow and flutter
figures for most audio equipment.
The first step is to determine the clock frequency from the jitter requirement.
The period of the highest frequency is 50 J.Lsec and 0.5% of this
is 250 nsec. Thus, the clock frequency must be at least 4 MHz to meet the
jitter specification. To meet the resolution requirement at 20 Hz, N must be
1/0.0006 or about 1,600. If the output frequency equation is rewritten as
F=6.4 X 10 9 /2 M , M can be found by applying M=10g2(6.4 X 10 9 /20),
which yields a figure of 28.2. Thus, the adder and register must be 28 bits
long. Note, however, that N will never be greater than 1,342,178, which
means that only about 20 bits are needed to represent N. The remaining