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DIGITAL-TO-ANALOG AND ANALOG-TO-DIGITAL CONVERTERS 229<br />

the errors are likely to be more evenly distributed, but, when they are not,<br />

the unit will have to be rejected. The point is that, with any DAC circuit<br />

using resistors and switches, overall linearity and accuracy cannot be better<br />

than the accuracy <strong>of</strong> the components.<br />

Resistive Divider<br />

The most common technique and the one on which nearly all commercial<br />

DACs are based is the resistive divider technique. Figure 7-5 shows a<br />

simple 2-bit resistive divider type <strong>of</strong> DAC. Each switch is controlled by a bit<br />

<strong>of</strong> the digital input. If a bit is a one, the switch is up connecting its resistor<br />

to the reference voltage; for zero bits it is down and the resistor is grounded.<br />

It is instructive to calculate the output voltage for each <strong>of</strong> the four possible<br />

combinations <strong>of</strong> 2 bits. Clearly, 00 would give zero output and 11 would<br />

give Vre/. The case <strong>of</strong> 10 gives an R-2R voltage divider, which results in<br />

2/3 Vrif output, while 01 gives a 2R-R divider and 1/3 Vre/. Once again the<br />

circuit is a multiplying DAC with an output proportional to the product <strong>of</strong> a<br />

reference voltage and a binary fraction input.<br />

The scheme is readily expanded to more bits by adding one switch and<br />

resistor for each new bit. The third bit, for example, would use a resistor<br />

value <strong>of</strong> 4R and the new voltage levels would be from 017 Vref to 717 Vre/ in<br />

steps <strong>of</strong> 1I7Vre/. Each new bit would use a resistor twice as large as the<br />

previous bit. Note that the output range stays the same (0 to Vrej) but that<br />

each added bit halves the size <strong>of</strong> the steps.<br />

This network is <strong>of</strong>ten called a weighted resistor voltage output network<br />

because the value <strong>of</strong> each resistor is weighted in inverse proportion to the<br />

significance <strong>of</strong> the bit controlling it, and the output IS inherently a voltage<br />

level. The performance <strong>of</strong> the circuit is, in general, good. Differential linearity<br />

is determined largely by the accuracy <strong>of</strong> the resistors used. If the resistors<br />

are not in the proper ratio and the resolution is high, grossly unequal step<br />

sizes or even nonmonotonic behavior is possible. As an example, assume an<br />

8-bit converter with perfect lR, 2R, ... 128R resistors but the lR resistor<br />

is 1% too large, that is, 1.01R. The table below shows the voltage output <strong>of</strong><br />

the network for some possible digital inputs:<br />

I<br />

t R MSB LSB OUTPUT<br />

! MSB<br />

0<br />

0 0 0<br />

)00""'<br />

v,ef 0 1/3 V,ef<br />

I<br />

t 2R 0 2/3 V,ef<br />

I LSB 1 V,ef<br />

0<br />

Fig. 7-5. Weighted resistor DAC

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