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Operating Manual Vol 1 - ES Documentation

Operating Manual Vol 1 - ES Documentation

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Digital Standard 3GPP W-CDMA (FDD)SMIQ(TRIGGER...) TRIGGER OUT 1/2 For selecting signals for outputs TRIGOUT 1 andTRIGOUT 2 in the PARDATA connector.The times only apply if the internal clock generationfrequency was not modified with the CHIP RATEVARIATION parameter.SLOT0.667 ms slot clockIEC/IEEE-bus command::SOUR:W3GP:TRIG:OUTP1 SLOTRADIO FRAME 10 ms frame clockIEC/IEEE-bus command::SOUR:W3GP:TRIG:OUTP1 RFRCHIP SEQUENCE Marker signal for identifying thePERIOD periodic repetition of the generatedchip sequenceIEC/IEEE-bus command::SOUR:W3GP:TRIG:OUTP1 CSPENHANCED Marker signal for marking theCHIP SEQUENCE periodic repetition of generatedPERIOD enhanced chip sequence (onlydisplayed with option SMIQB48installed).IEC/IEEE-bus command::SOUR:W3GP:TRIG:OUTP1 ECSPP-CCPCH Marker signal for identifying/BCH SFN the restart of the systemR<strong>ES</strong>TART frame number (SFN Restart)after 4096 frames (available onlywhen option SMIQB48 is installedand a P-CCPCH/BCH isgenerated).IEC/IEEE-bus command::SOUR:W3GP:TRIG:OUTP1 SFNRTRIGGER OUT 1/2 POL Selects the polarity of signals at the TRIGOUT 1 andTRIGOUT 2 outputs in the PARDATA connector.IEC/IEEE-bus :SOUR:W3GP:OUTP2:POL POSTRIGGER OUT 1/2DELAYSetting of the number of chips by which the selectedtrigger output signal is delayed.IEC/IEEE-bus :SOUR:W3GP:OUTP2:DEL 01125.5555.03 2.186E-9

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