Intel® Architecture Instruction Set Extensions Programming Reference

INSTRUCTION SET REFERENCE
PACKSSWB/PACKSSDW — Pack with Signed Saturation
Opcode/
Instruction
Description
Op/
En
64/32
-bit
Mode
CPUID
Feature
Flag
Description
66 0F 63 /r A V/V SSE2 Converts 8 packed signed word integers from xmm1 and from
PACKSSWB xmm1, xmm2/m128
xxm2/m128 into 16 packed signed byte integers in xmm1 using
signed saturation.
66 0F 6B /r A V/V SSE2 Converts 4 packed signed doubleword integers from xmm1 and
PACKSSDW xmm1, xmm2/m128
from xmm2/m128 into 8 packed signed word integers in
xmm1using signed saturation.
VEX.NDS.128.66.0F.WIG 63 /r B V/V AVX Converts 8 packed signed word integers from xmm2 and from
VPACKSSWB xmm1, xmm2,
xmm3/m128
xmm3/m128 into 16 packed signed byte integers in xmm1 using
signed saturation.
VEX.NDS.128.66.0F.WIG 6B /r B V/V AVX Converts 4 packed signed doubleword integers from xmm2 and
VPACKSSDW xmm1, xmm2,
xmm3/m128
from xmm3/m128 into 8 packed signed word integers in
xmm1using signed saturation.
VEX.NDS.256.66.0F.WIG 63 /r B V/V AVX2 Converts 16 packed signed word integers from ymm2 and from
VPACKSSWB ymm1, ymm2,
ymm3/m256
ymm3/m256 into 32 packed signed byte integers in ymm1 using
signed saturation.
VEX.NDS.256.66.0F.WIG 6B /r B V/V AVX2 Converts 8 packed signed doubleword integers from ymm2 and
VPACKSSDW ymm1, ymm2,
ymm3/m256
from ymm3/m256 into 16 packed signed word integers in
ymm1using signed saturation.
Instruction Operand Encoding
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (r, w) ModRM:r/m (r) NA NA
B ModRM:reg (w) VEX.vvvv ModRM:r/m (r) NA
The PACKSSWB or VPACKSSWB instruction converts 8 or 16 signed word integers from the first source operand and
8 or 16 signed word integers from the second source operand into 16 or 32 signed byte integers and stores the
result in the destination operand. If a signed word integer value is beyond the range of a signed byte integer (that
is, greater than 7FH for a positive integer or greater than 80H for a negative integer), the saturated signed byte
integer value of 7FH or 80H, respectively, is stored in the destination.
The PACKSSDW instruction packs 4 or 8 signed doublewords from the first source operand and 4 or 8 signed
doublewords from the second source operand into 8 or 16 signed words in the destination operand. If a signed
doubleword integer value is beyond the range of a signed word (that is, greater than 7FFFH for a positive integer
or greater than 8000H for a negative integer), the saturated signed word integer value of 7FFFH or 8000H, respectively,
is stored into the destination.
VEX.256 encoded version: The first source operand is a YMM register. The second source operand is a YMM register
or a 256-bit memory location. The destination operand is a YMM register.
VEX.128 encoded version: The first source operand is an XMM register. The second source operand is an XMM
register or 128-bit memory location. The destination operand is an XMM register. The upper bits (255:128) of the
corresponding YMM register destination are zeroed.
128-bit Legacy SSE version: The first source operand is an XMM register. The second operand can be an XMM
register or a 128-bit memory location. The destination is not distinct from the first source XMM register and the
upper bits (255:128) of the corresponding YMM register destination are unmodified.
5-16 Ref. # 319433-014