Intel® Architecture Instruction Set Extensions Programming Reference

APPLICATION PROGRAMMING MODEL
}
and eax, 06H
cmp eax, 06H; check OS has enabled both XMM and YMM state support
jne not_supported
mov eax, 1
jmp done
NOT_SUPPORTED:
mov eax, 0
done:
INT supports_VPCLMULQDQ()
{ ; result in eax
mov eax, 1
cpuid
and ecx, 018000002H
cmp ecx, 018000002H; check OSXSAVE, AVX and PCLMULQDQ feature flags
jne not_supported
; processor supports AVX and VPCLMULQDQ instructions and XGETBV is enabled by OS
mov ecx, 0; specify 0 for XFEATURE_ENABLED_MASK register
XGETBV; result in EDX:EAX
and eax, 06H
cmp eax, 06H; check OS has enabled both XMM and YMM state support
jne not_supported
mov eax, 1
jmp done
NOT_SUPPORTED:
mov eax, 0
done:
}
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2.2.3 Detection of AVX2
Hardware support for AVX2 is indicated by CPUID.(EAX=07H, ECX=0H):EBX.AVX2[bit 5]=1.
Application Software must identify that hardware supports AVX as explained in Section 2.2, after that it must also
detect support for AVX2 by checking CPUID.(EAX=07H, ECX=0H):EBX.AVX2[bit 5]. The recommended
pseudocode sequence for detection of AVX2 is:
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INT supports_avx2()
{ ; result in eax
mov eax, 1
cpuid
and ecx, 018000000H
cmp ecx, 018000000H; check both OSXSAVE and AVX feature flags
2-4 Ref. # 319433-014