Intel® Architecture Instruction Set Extensions Programming Reference

PMOVMSKB — Move Byte Mask
Opcode/
Instruction
Description
Instruction Operand Encoding
INSTRUCTION SET REFERENCE
Creates a mask made up of the most significant bit of each byte of the source operand (second operand) and stores
the result in the low word or dword of the destination operand (first operand). The source operand is an XMM
register; the destination operand is a general-purpose register.
The mask is 16-bits for 128-bit source operand and 32-bits for 256-bit source operand. The destination operand is
a general-purpose register.
In 64-bit mode the default operand size of the destination operand is 64 bits. Bits 63:32 are filled with zero if the
source operand is a 256-bit YMM register. The upper bits above bit 15 are filled with zeros if the source operand is
a 128-bit XMM register. REX.W is ignored
VEX.128 encoded version: The source operand is XMM register.
VEX.256 encoded version: The source operand is YMM register.
Note: In VEX encoded versions VEX.vvvv is reserved and must be 1111b otherwise instructions will #UD.
Operation
Op/
En
64/32
-bit
Mode
CPUID
Feature
Flag
VPMOVMSKB instruction with 256-bit source operand and r32:
r32[0] SRC[7];
r32[1] SRC[15];
(* Repeat operation for bytes 3rd through 31*)
r32[31] SRC[255];
VPMOVMSKB instruction with 256-bit source operand and r64:
r64[0] SRC[7];
r64[1] SRC[15];
(* Repeat operation for bytes 2 through 31*)
r64[31] SRC[255];
r64[63:32] ZERO_FILL;
PMOVMSKB instruction with 128-bit source operand and r32:
r32[0] SRC[7];
r32[1] SRC[15];
(* Repeat operation for bytes 2 through 14 *)
r32[15] SRC[127];
r32[31:16] ZERO_FILL;
Description
66 0F D7 /r A V/V SSE2 Move a 16-bit mask of xmm1 to reg. The upper bits of r32 or r64 are
filled with zeros.
PMOVMSKB reg, xmm1
VEX.128.66.0F.WIG D7 /r A V/V AVX Move a 16-bit mask of xmm1 to reg. The upper bits of r32 or r64 are
filled with zeros.
VPMOVMSKB reg, xmm1
VEX.256.66.0F.WIG D7 /r A V/V AVX2 Move a 32-bit mask of ymm1 to reg. The upper bits of r64 are filled
with zeros.
VPMOVMSKB reg, ymm1
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (w) ModRM:r/m (r) NA NA
Ref. # 319433-014 5-87