Intel® Architecture Instruction Set Extensions Programming Reference

}
VPSHUFB (VEX.128 encoded version)
for i = 0 to 15 {
if (SRC2[(i * 8)+7] == 1 ) then
DEST[(i*8)+7..(i*8)+0] 0;
else
index[3..0] SRC2[(i*8)+3 .. (i*8)+0];
DEST[(i*8)+7..(i*8)+0] SRC1[(index*8+7)..(index*8+0)];
endif
}
DEST[VLMAX:128] 0
PSHUFB (128-bit Legacy SSE version)
for i = 0 to 15 {
if (SRC[(i * 8)+7] == 1 ) then
DEST[(i*8)+7..(i*8)+0] 0;
else
index[3..0] SRC[(i*8)+3 .. (i*8)+0];
DEST[(i*8)+7..(i*8)+0] DEST[(index*8+7)..(index*8+0)];
endif
}
DEST[VLMAX:128] (Unmodified)
Intel C/C++ Compiler Intrinsic Equivalent
(V)PSHUFB: __m128i _mm_shuffle_epi8(__m128i a, __m128i b)
VPSHUFB: __m256i _mm256_shuffle_epi8(__m256i a, __m256i b)
SIMD Floating-Point Exceptions
None
Other Exceptions
See Exceptions Type 4
INSTRUCTION SET REFERENCE
Ref. # 319433-014 5-121