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Intel® Architecture Instruction Set Extensions Programming Reference

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INSTRUCTION SET REFERENCE<br />

PSUBUSB/PSUBUSW — Subtract Packed Unsigned Integers with Unsigned Saturation<br />

Opcode/<br />

<strong>Instruction</strong><br />

Description<br />

Op/<br />

En<br />

64/3<br />

2-bit<br />

Mode<br />

CPUID<br />

Feature<br />

Flag<br />

Description<br />

66 0F D8 /r A V/V SSE2 Subtract packed unsigned byte integers in xmm2/m128 from packed<br />

unsigned byte integers in xmm1 and saturate result.<br />

PSUBUSB xmm1, xmm2/m128<br />

66 0F D9 /r A V/V SSE2 Subtract packed unsigned word integers in xmm2/m128 from packed<br />

unsigned word integers in xmm1 and saturate result.<br />

PSUBUSW xmm1, xmm2/m128<br />

VEX.NDS.128.66.0F.WIG D8 /r B V/V AVX Subtract packed unsigned byte integers in xmm3/m128 from packed<br />

unsigned byte integers in xmm2 and saturate result.<br />

VPSUBUSB xmm1, xmm2,<br />

xmm3/m128<br />

VEX.NDS.128.66.0F.WIG D9 /r B V/V AVX Subtract packed unsigned word integers in xmm3/m128 from packed<br />

unsigned word integers in xmm2 and saturate result.<br />

VPSUBUSW xmm1, xmm2,<br />

xmm3/m128<br />

VEX.NDS.256.66.0F.WIG D8 /r B V/V AVX2 Subtract packed unsigned byte integers in ymm3/m256 from packed<br />

unsigned byte integers in ymm2 and saturate result.<br />

VPSUBUSB ymm1, ymm2,<br />

ymm3/m256<br />

VEX.NDS.256.66.0F.WIG D9 /r B V/V AVX2 Subtract packed unsigned word integers in ymm3/m256 from packed<br />

unsigned word integers in ymm2 and saturate result.<br />

VPSUBUSW ymm1, ymm2,<br />

ymm3/m256<br />

<strong>Instruction</strong> Operand Encoding<br />

Op/En Operand 1 Operand 2 Operand 3 Operand 4<br />

A ModRM:reg (r, w) ModRM:r/m (r) NA NA<br />

B ModRM:reg (w) VEX.vvvv ModRM:r/m (r) NA<br />

Performs a SIMD subtract of the packed unsigned integers of the second source operand from the packed unsigned<br />

integers of the first source operand and stores the packed unsigned integer results in the destination operand. See<br />

Figure 9-4 in the <strong>Intel®</strong> 64 and IA-32 <strong>Architecture</strong>s Software Developer’s Manual, Volume 1, for an illustration of a<br />

SIMD operation. Overflow is handled with unsigned saturation, as described in the following paragraphs.<br />

The first source and destination operands are XMM registers. The second source operand can be either an XMM<br />

register or a 128-bit memory location.<br />

The PSUBUSB instruction subtracts packed unsigned byte integers. When an individual byte result is less than zero,<br />

the saturated value of 00H is written to the destination operand.<br />

The PSUBUSW instruction subtracts packed unsigned word integers. When an individual word result is less than<br />

zero, the saturated value of 0000H is written to the destination operand.<br />

128-bit Legacy SSE version: The second source operand is an XMM register or a 128-bit memory location. The first<br />

source operand and destination operands are XMM registers. Bits (255:128) of the corresponding YMM destination<br />

register remain unchanged.<br />

VEX.128 encoded version: The second source operand is an XMM register or a 128-bit memory location. The first<br />

source operand and destination operands are XMM registers. Bits (127:128) of the corresponding YMM register are<br />

zeroed.<br />

VEX.256 encoded version: The second source operand is an YMM register or a 256-bit memory location. The first<br />

source operand and destination operands are YMM registers.<br />

5-158 Ref. # 319433-014

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