Intel® Architecture Instruction Set Extensions Programming Reference

INSTRUCTION SET REFERENCE - FMA
VFNMADD132PS/VFNMADD213PS/VFNMADD231PS — Fused Negative Multiply-Add of Packed
Single-Precision Floating-Point Values
Opcode/
Instruction
Description
Op/
En
64/32
-bit
Mode
CPUID
Feature
Flag
Description
VEX.DDS.128.66.0F38.W0 9C /r A V/V FMA Multiply packed single-precision floating-point values from xmm0
VFNMADD132PS xmm0, xmm1,
xmm2/m128
and xmm2/mem, negate the multiplication result and add to xmm1
and put result in xmm0.
VEX.DDS.128.66.0F38.W0 AC /r A V/V FMA Multiply packed single-precision floating-point values from xmm0
VFNMADD213PS xmm0, xmm1,
xmm2/m128
and xmm1, negate the multiplication result and add to xmm2/mem
and put result in xmm0.
VEX.DDS.128.66.0F38.W0 BC /r A V/V FMA Multiply packed single-precision floating-point values from xmm1
VFNMADD231PS xmm0, xmm1,
xmm2/m128
and xmm2/mem, negate the multiplication result and add to xmm0
and put result in xmm0.
VEX.DDS.256.66.0F38.W0 9C /r A V/V FMA Multiply packed single-precision floating-point values from ymm0
VFNMADD132PS ymm0, ymm1,
ymm2/m256
and ymm2/mem, negate the multiplication result and add to ymm1
and put result in ymm0.
VEX.DDS.256.66.0F38.W0 AC /r A V/V FMA Multiply packed single-precision floating-point values from ymm0
VFNMADD213PS ymm0, ymm1,
ymm2/m256
and ymm1, negate the multiplication result and add to ymm2/mem
and put result in ymm0.
VEX.DDS.256.66.0F38.0 BC /r A V/V FMA Multiply packed single-precision floating-point values from ymm1
VFNMADD231PS ymm0, ymm1,
ymm2/m256
and ymm2/mem, negate the multiplication result and add to ymm0
and put result in ymm0.
Instruction Operand Encoding
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (r, w) VEX.vvvv (r) ModRM:r/m (r) NA
VFNMADD132PS: Multiplies the four or eight packed single-precision floating-point values from the first source
operand to the four or eight packed single-precision floating-point values in the third source operand, adds the
negated infinite precision intermediate result to the four or eight packed single-precision floating-point values in
the second source operand, performs rounding and stores the resulting four or eight packed single-precision
floating-point values to the destination operand (first source operand).
VFNMADD213PS: Multiplies the four or eight packed single-precision floating-point values from the second source
operand to the four or eight packed single-precision floating-point values in the first source operand, adds the
negated infinite precision intermediate result to the four or eight packed single-precision floating-point values in
the third source operand, performs rounding and stores the resulting the four or eight packed single-precision
floating-point values to the destination operand (first source operand).
VFNMADD231PS: Multiplies the four or eight packed single-precision floating-point values from the second source
operand to the four or eight packed single-precision floating-point values in the third source operand, adds the
negated infinite precision intermediate result to the four or eight packed single-precision floating-point values in
the first source operand, performs rounding and stores the resulting four or eight packed single-precision floatingpoint
values to the destination operand (first source operand).
VEX.256 encoded version: The destination operand (also first source operand) is a YMM register and encoded in
reg_field. The second source operand is a YMM register and encoded in VEX.vvvv. The third source operand is a
YMM register or a 256-bit memory location and encoded in rm_field.
Ref. # 319433-014 6-37