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Intel® Architecture Instruction Set Extensions Programming Reference

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INSTRUCTION SET REFERENCE<br />

CHAPTER 5<br />

INSTRUCTION SET REFERENCE<br />

<strong>Instruction</strong>s that are described in this document follow the general documentation convention established in Intel<br />

64 and IA-32 <strong>Architecture</strong>s Software Developer’s Manual Volume 2A and 2B. Additional notations and conventions<br />

adopted in this document are listed in Section 5.1. Section 5.2 covers supplemental information that applies to a<br />

specific subset of instructions.<br />

5.1 INTERPRETING INSTRUCTION REFERENCE PAGES<br />

This section describes the format of information contained in the instruction reference pages in this chapter. It<br />

explains notational conventions and abbreviations used in these sections that are outside of those conventions<br />

described in Section 3.1 of the Intel 64 and IA-32 <strong>Architecture</strong>s Software Developer’s Manual Volume 2A.<br />

5.1.1 <strong>Instruction</strong> Format<br />

The following is an example of the format used for each instruction description in this chapter. The table below<br />

provides an example summary table:<br />

Ref. # 319433-014 5-1

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