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Intel® Architecture Instruction Set Extensions Programming Reference

Intel® Architecture Instruction Set Extensions Programming Reference

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CLAC—Clear AC Flag in EFLAGS Register<br />

Opcode/<br />

<strong>Instruction</strong><br />

0F 01 CA<br />

CLAC<br />

Description<br />

<strong>Instruction</strong> Operand Encoding<br />

ADDITIONAL NEW INSTRUCTIONS<br />

CLAC clears the AC flag bit in EFLAGS/RFLAGS without affecting other bits. Attempt to execute CLAC when CPL ><br />

0 will cause #UD.<br />

This instruction's operation is the same in non-64-bit modes and 64-bit mode.<br />

Operation<br />

EFLAGS.AC ← 0;<br />

Flags Affected<br />

AC cleared, All other flags are unchanged<br />

C/C++ Compiler Intrinsic Equivalent<br />

Protected Mode Exceptions<br />

#UD If the LOCK prefix is used.<br />

If the CPL > 0.<br />

If CPUID.(EAX=07H, ECX=0H):EBX.SMAP[bit 20] = 0<br />

Real-Address Mode Exceptions<br />

#UD If the LOCK prefix is used.<br />

If CPUID.(EAX=07H, ECX=0H):EBX.SMAP[bit 20] = 0<br />

Virtual-8086 Mode Exceptions<br />

#UD The CLAC instruction is not recognized in virtual-8086 mode.<br />

Compatibility Mode Exceptions<br />

#UD If the LOCK prefix is used.<br />

If the CPL > 0.<br />

If CPUID.(EAX=07H, ECX=0H):EBX.SMAP[bit 20] = 0<br />

64-Bit Mode Exceptions<br />

Op/<br />

En<br />

64/32 bit<br />

Mode<br />

Support<br />

CPUID<br />

Feature<br />

Flag<br />

Description<br />

A V/V SMAP Clear only the AC flag in the EFLAGS register.<br />

Op/En Operand 1 Operand 2 Operand 3 Operand 4<br />

A NA NA NA NA<br />

#UD If the LOCK prefix is used.<br />

If the CPL > 0.<br />

If CPUID.(EAX=07H, ECX=0H):EBX.SMAP[bit 20] = 0<br />

Ref. # 319433-014 9-13

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