Intel® Architecture Instruction Set Extensions Programming Reference

Table B-2. Promoted Vector Integer SIMD Instructions in AVX2
VEX.256 Encoding VEX.128 Encoding Group Instruction
AVX2 AVX PMINSB
AVX2 AVX PMINSD
AVX2 AVX PMINUD
AVX2 AVX PMINUW
AVX2 AVX PMOVSXxx
AVX2 AVX PMOVZXxx
AVX2 AVX PMULDQ
AVX2 AVX PMULLD
AVX AVX PTEST
AVX2 AVX SSE4.2 PCMPGTQ
no AVX PCMPESTRI
no AVX PCMPESTRM
no AVX PCMPISTRI
no AVX PCMPISTRM
no AVX AESNI AESDEC
no AVX AESDECLAST
no AVX AESENC
no AVX AESECNLAST
no AVX AESIMC
no AVX AESKEYGENASSIST
no AVX CLMUL PCLMULQDQ
Table B-3 compares complementary SIMD functionalities introduced in AVX and AVX2. instructions.
Table B-3. VEX-Only SIMD Instructions in AVX and AVX2
AVX2 AVX Comment
VBROADCASTI128 VBROADCASTF128 256-bit only
VBROADCASTSD ymm1, xmm VBROADCASTSD ymm1, m64 256-bit only
VBROADCASTSS (from xmm) VBROADCASTSS (from m32)
VEXTRACTI128 VEXTRACTF128 256-bit only
VINSERTI128 VINSERTF128 256-bit only
VPMASKMOVD VMASKMOVPS
VPMASKMOVQ! VMASKMOVPD
VPERMILPD in-lane
VPERMILPS in-lane
VPERM2I128 VPERM2F128 256-bit only
VPERMD cross-lane
VPERMPS cross-lane
VPERMQ cross-lane
INSTRUCTION SUMMARY
Ref. # 319433-014 B-11