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Intel® Architecture Instruction Set Extensions Programming Reference

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INSTRUCTION SUMMARY<br />

Table B-3. VEX-Only SIMD <strong>Instruction</strong>s in AVX and AVX2<br />

AVX2 AVX Comment<br />

VPERMPD cross-lane<br />

VTESTPD<br />

VTESTPS<br />

VPBLENDD<br />

VPSLLVD/Q<br />

VPSRAVD<br />

VPSRLVD/Q<br />

VGATHERDPD/QPD<br />

VGATHERDPS/QPS<br />

VPGATHERDD/QD<br />

VPGATHERDQ/QQ<br />

Table B-4. New Primitive in AVX2 <strong>Instruction</strong>s<br />

Opcode <strong>Instruction</strong> Description<br />

VEX.NDS.256.66.0F38.W0 36 /r VPERMD ymm1, ymm2, ymm3/m256 Permute doublewords in ymm3/m256 using<br />

indexes in ymm2 and store the result in ymm1.<br />

VEX.NDS.256.66.0F3A.W1 01 /r VPERMPD ymm1, ymm2/m256, imm8 Permute double-precision FP elements in<br />

ymm2/m256 using indexes in imm8 and store<br />

the result in ymm1.<br />

VEX.NDS.256.66.0F38.W0 16 /r VPERMPS ymm1, ymm2, ymm3/m256 Permute single-precision FP elements in<br />

ymm3/m256 using indexes in ymm2 and store<br />

the result in ymm1.<br />

VEX.NDS.256.66.0F3A.W1 00 /r VPERMQ ymm1, ymm2/m256, imm8 Permute quadwords in ymm2/m256 using<br />

indexes in imm8 and store the result in ymm1.<br />

VEX.NDS.128.66.0F38.W0 47 /r VPSLLVD xmm1, xmm2, xmm3/m128 Shift doublewords in xmm2 left by amount specified<br />

in the corresponding element of<br />

xmm3/m128 while shifting in 0s.<br />

VEX.NDS.128.66.0F38.W1 47 /r VPSLLVQ xmm1, xmm2, xmm3/m128 Shift quadwords in xmm2 left by amount specified<br />

in the corresponding element of<br />

xmm3/m128 while shifting in 0s.<br />

VEX.NDS.256.66.0F38.W0 47 /r VPSLLVD ymm1, ymm2, ymm3/m256 Shift doublewords in ymm2 left by amount specified<br />

in the corresponding element of<br />

ymm3/m256 while shifting in 0s.<br />

VEX.NDS.256.66.0F38.W1 47 /r VPSLLVQ ymm1, ymm2, ymm3/m256 Shift quadwords in ymm2 left by amount specified<br />

in the corresponding element of<br />

ymm3/m256 while shifting in 0s.<br />

VEX.NDS.128.66.0F38.W0 46 /r VPSRAVD xmm1, xmm2, xmm3/m128 Shift doublewords in xmm2 right by amount<br />

specified in the corresponding element of<br />

xmm3/m128 while shifting in the sign bits.<br />

VEX.NDS.128.66.0F38.W0 45 /r VPSRLVD xmm1, xmm2, xmm3/m128 Shift doublewords in xmm2 right by amount<br />

specified in the corresponding element of<br />

xmm3/m128 while shifting in 0s.<br />

VEX.NDS.128.66.0F38.W1 45 r VPSRLVQ xmm1, xmm2, xmm3/m128 Shift quadwords in xmm2 right by amount specified<br />

in the corresponding element of<br />

xmm3/m128 while shifting in 0s.<br />

B-12 Ref. # 319433-014

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