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Intel® Architecture Instruction Set Extensions Programming Reference

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INSTRUCTION SET REFERENCE - FMA<br />

VFMADD132PD/VFMADD213PD/VFMADD231PD — Fused Multiply-Add of Packed Double-<br />

Precision Floating-Point Values<br />

Opcode/<br />

<strong>Instruction</strong><br />

Description<br />

Op/<br />

En<br />

64/32<br />

-bit<br />

Mode<br />

CPUID<br />

Feature<br />

Flag<br />

Description<br />

VEX.DDS.128.66.0F38.W1 98 /r A V/V FMA Multiply packed double-precision floating-point values from xmm0<br />

and xmm2/mem, add to xmm1 and put result in xmm0.<br />

VFMADD132PD xmm0, xmm1,<br />

xmm2/m128<br />

VEX.DDS.128.66.0F38.W1 A8<br />

/r<br />

VFMADD213PD xmm0, xmm1,<br />

xmm2/m128<br />

VEX.DDS.128.66.0F38.W1 B8<br />

/r<br />

VFMADD231PD xmm0, xmm1,<br />

xmm2/m128<br />

A V/V FMA Multiply packed double-precision floating-point values from xmm0<br />

and xmm1, add to xmm2/mem and put result in xmm0.<br />

A V/V FMA Multiply packed double-precision floating-point values from xmm1<br />

and xmm2/mem, add to xmm0 and put result in xmm0.<br />

VEX.DDS.256.66.0F38.W1 98 /r A V/V FMA Multiply packed double-precision floating-point values from ymm0<br />

and ymm2/mem, add to ymm1 and put result in ymm0.<br />

VFMADD132PD ymm0, ymm1,<br />

ymm2/m256<br />

VEX.DDS.256.66.0F38.W1 A8<br />

/r<br />

VFMADD213PD ymm0, ymm1,<br />

ymm2/m256<br />

VEX.DDS.256.66.0F38.W1 B8<br />

/r<br />

VFMADD231PD ymm0, ymm1,<br />

ymm2/m256<br />

A V/V FMA Multiply packed double-precision floating-point values from ymm0<br />

and ymm1, add to ymm2/mem and put result in ymm0.<br />

A V/V FMA Multiply packed double-precision floating-point values from ymm1<br />

and ymm2/mem, add to ymm0 and put result in ymm0.<br />

<strong>Instruction</strong> Operand Encoding<br />

Op/En Operand 1 Operand 2 Operand 3 Operand 4<br />

A ModRM:reg (r, w) VEX.vvvv (r) ModRM:r/m (r) NA<br />

Performs a set of SIMD multiply-add computation on packed double-precision floating-point values using three<br />

source operands and writes the multiply-add results in the destination operand. The destination operand is also the<br />

first source operand. The second operand must be a SIMD register. The third source operand can be a SIMD<br />

register or a memory location.<br />

VFMADD132PD: Multiplies the two or four packed double-precision floating-point values from the first source<br />

operand to the two or four packed double-precision floating-point values in the third source operand, adds the infinite<br />

precision intermediate result to the two or four packed double-precision floating-point values in the second<br />

source operand, performs rounding and stores the resulting two or four packed double-precision floating-point<br />

values to the destination operand (first source operand).<br />

VFMADD213PD: Multiplies the two or four packed double-precision floating-point values from the second source<br />

operand to the two or four packed double-precision floating-point values in the first source operand, adds the infinite<br />

precision intermediate result to the two or four packed double-precision floating-point values in the third<br />

source operand, performs rounding and stores the resulting two or four packed double-precision floating-point<br />

values to the destination operand (first source operand).<br />

6-2 Ref. # 319433-014

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