03.03.2013 Views

Intel® Architecture Instruction Set Extensions Programming Reference

Intel® Architecture Instruction Set Extensions Programming Reference

Intel® Architecture Instruction Set Extensions Programming Reference

SHOW MORE
SHOW LESS

You also want an ePaper? Increase the reach of your titles

YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.

VPERMD — Full Doublewords Element Permutation<br />

Opcode/<br />

<strong>Instruction</strong><br />

Description<br />

<strong>Instruction</strong> Operand Encoding<br />

INSTRUCTION SET REFERENCE<br />

Use the index values in each dword element of the first source operand (the second operand) to select a dword<br />

element in the second source operand (the third operand), the resultant dword value from the second source<br />

operand is copied to the destination operand (the first operand) in the corresponding position of the index element.<br />

Note that this instruction permits a doubleword in the source operand to be copied to more than one doubleword<br />

location in the destination operand.<br />

An attempt to execute VPERMD encoded with VEX.L= 0 will cause an #UD exception.<br />

Operation<br />

VPERMD (VEX.256 encoded version)<br />

DEST[31:0] (SRC2[255:0] >> (SRC1[2:0] * 32))[31:0];<br />

DEST[63:32] (SRC2[255:0] >> (SRC1[34:32] * 32))[31:0];<br />

DEST[95:64] (SRC2[255:0] >> (SRC1[66:64] * 32))[31:0];<br />

DEST[127:96] (SRC2[255:0] >> (SRC1[98:96] * 32))[31:0];<br />

DEST[159:128] (SRC2[255:0] >> (SRC1[130:128] * 32))[31:0];<br />

DEST[191:160] (SRC2[255:0] >> (SRC1[162:160] * 32))[31:0];<br />

DEST[223:192] (SRC2[255:0] >> (SRC1[194:192] * 32))[31:0];<br />

DEST[255:224] (SRC2[255:0] >> (SRC1[226:224] * 32))[31:0];<br />

Intel C/C++ Compiler Intrinsic Equivalent<br />

VPERMD: __m256i _mm256_permutevar8x32_epi32(__m256i a, __m256i offsets);<br />

SIMD Floating-Point Exceptions<br />

None<br />

Other Exceptions<br />

Op/<br />

En<br />

64/32<br />

-bit<br />

Mode<br />

See Exceptions Type 4; additionally<br />

#UD If VEX.L = 0 for VPERMD,<br />

If VEX.W = 1.<br />

CPUID<br />

Feature<br />

Flag<br />

Description<br />

VEX.NDS.256.66.0F38.W0 36 /r A V/V AVX2 Permute doublewords in ymm3/m256 using indexes in ymm2 and<br />

store the result in ymm1.<br />

VPERMD ymm1, ymm2,<br />

ymm3/m256<br />

Op/En Operand 1 Operand 2 Operand 3 Operand 4<br />

A ModRM:reg (w) VEX.vvvv ModRM:r/m (r) NA<br />

Ref. # 319433-014 5-185

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!