Intel® Architecture Instruction Set Extensions Programming Reference

INSTRUCTION SET REFERENCE - FMA
VFNMSUB132PS/VFNMSUB213PS/VFNMSUB231PS — Fused Negative Multiply-Subtract of
Packed Single-Precision Floating-Point Values
Opcode/
Instruction
Description
Op/
En
64/32
-bit
Mode
CPUID
Feature
Flag
Description
VEX.DDS.128.66.0F38.W0 9E /r A V/V FMA Multiply packed single-precision floating-point values from xmm0
VFNMSUB132PS xmm0, xmm1,
xmm2/m128
and xmm2/mem, negate the multiplication result and subtract
xmm1 and put result in xmm0.
VEX.DDS.128.66.0F38.W0 AE /r A V/V FMA Multiply packed single-precision floating-point values from xmm0
VFNMSUB213PS xmm0, xmm1,
xmm2/m128
and xmm1, negate the multiplication result and subtract
xmm2/mem and put result in xmm0.
VEX.DDS.128.66.0F38.W0 BE /r A V/V FMA Multiply packed single-precision floating-point values from xmm1
VFNMSUB231PS xmm0, xmm1,
xmm2/m128
and xmm2/mem, negate the multiplication result and subtract
xmm0 and put result in xmm0.
VEX.DDS.256.66.0F38.W0 9E /r A V/V FMA Multiply packed single-precision floating-point values from ymm0
VFNMSUB132PS ymm0, ymm1,
ymm2/m256
and ymm2/mem, negate the multiplication result and subtract
ymm1 and put result in ymm0.
VEX.DDS.256.66.0F38.W0 AE /r A V/V FMA Multiply packed single-precision floating-point values from ymm0
VFNMSUB213PS ymm0, ymm1,
ymm2/m256
and ymm1, negate the multiplication result and subtract
ymm2/mem and put result in ymm0.
VEX.DDS.256.66.0F38.0 BE /r A V/V FMA Multiply packed single-precision floating-point values from ymm1
VFNMSUB231PS ymm0, ymm1,
ymm2/m256
and ymm2/mem, negate the multiplication result and subtract
ymm0 and put result in ymm0.
Instruction Operand Encoding
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (r, w) VEX.vvvv (r) ModRM:r/m (r) NA
VFNMSUB132PS: Multiplies the four or eight packed single-precision floating-point values from the first source
operand to the four or eight packed single-precision floating-point values in the third source operand. From
negated infinite precision intermediate results, subtracts the four or eight packed single-precision floating-point
values in the second source operand, performs rounding and stores the resulting four or eight packed single-precision
floating-point values to the destination operand (first source operand).
VFNMSUB213PS: Multiplies the four or eight packed single-precision floating-point values from the second source
operand to the four or eight packed single-precision floating-point values in the first source operand. From negated
infinite precision intermediate results, subtracts the four or eight packed single-precision floating-point values in
the third source operand, performs rounding and stores the resulting four or eight packed single-precision floatingpoint
values to the destination operand (first source operand).
VFNMSUB231PS: Multiplies the four or eight packed single-precision floating-point values from the second source
to the four or eight packed single-precision floating-point values in the third source operand. From negated infinite
precision intermediate results, subtracts the four or eight packed single-precision floating-point values in the first
source operand, performs rounding and stores the resulting four or eight packed single-precision floating-point
values to the destination operand (first source operand).
VEX.256 encoded version: The destination operand (also first source operand) is a YMM register and encoded in
reg_field. The second source operand is a YMM register and encoded in VEX.vvvv. The third source operand is a
YMM register or a 256-bit memory location and encoded in rm_field.
Ref. # 319433-014 6-47