Intel® Architecture Instruction Set Extensions Programming Reference

PMINUB/PMINUW/PMINUD — Minimum of Packed Unsigned Integers
Opcode/
Instruction
Description
Op/
En
64/32
-bit
Mode
CPUID
Feature
Flag
Description
Instruction Operand Encoding
INSTRUCTION SET REFERENCE
66 0F DA /r A V/V SSE2 Compare packed unsigned byte integers in xmm1 and
xmm2/m128 and store packed minimum values in xmm1.
PMINUB xmm1, xmm2/m128
66 0F 38 3A/r A V/V SSE4_1 Compare packed unsigned word integers in xmm2/m128 and
xmm1 and store packed minimum values in xmm1.
PMINUW xmm1, xmm2/m128
66 0F 38 3B /r A V/V SSE4_1 Compare packed unsigned dword integers in xmm1 and
xmm2/m128 and store packed minimum values in xmm1.
PMINUD xmm1, xmm2/m128
VEX.NDS.128.66.0F.WIG DA /r B V/V AVX Compare packed unsigned byte integers in xmm2 and
xmm3/m128 and store packed minimum values in xmm1.
VPMINUB xmm1, xmm2,
xmm3/m128
VEX.NDS.128.66.0F38.WIG 3A /r B V/V AVX Compare packed unsigned word integers in xmm3/m128 and
xmm2 and return packed minimum values in xmm1.
VPMINUW xmm1, xmm2,
xmm3/m128
VEX.NDS.128.66.0F38.WIG 3B /r B V/V AVX Compare packed unsigned dword integers in xmm2 and
xmm3/m128 and store packed minimum values in xmm1.
VPMINUD xmm1, xmm2,
xmm3/m128
VEX.NDS.256.66.0F.WIG DA /r B V/V AVX2 Compare packed unsigned byte integers in ymm2 and
ymm3/m256 and store packed minimum values in ymm1.
VPMINUB ymm1, ymm2,
ymm3/m256
VEX.NDS.256.66.0F38.WIG 3A /r B V/V AVX2 Compare packed unsigned word integers in ymm3/m256 and
ymm2 and return packed minimum values in ymm1.
VPMINUW ymm1, ymm2,
ymm3/m256
VEX.NDS.256.66.0F38.WIG 3B /r B V/V AVX2 Compare packed unsigned dword integers in ymm2 and
ymm3/m256 and store packed minimum values in ymm1.
VPMINUD ymm1, ymm2,
ymm3/m256
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (r, w) ModRM:r/m (r) NA NA
B ModRM:reg (w) VEX.vvvv ModRM:r/m (r) NA
Performs a SIMD compare of the packed unsigned byte, word, or dword integers in the second source operand and
the first source operand and returns the minimum value for each pair of integers to the destination operand.
128-bit Legacy SSE version: The first source and destination operands are XMM registers. The second source
operand is an XMM register or a 128-bit memory location. Bits (255:128) of the corresponding YMM destination
register remain unchanged.
VEX.128 encoded version: The first source and destination operands are XMM registers. The second source
operand is an XMM register or a 128-bit memory location. Bits (255:128) of the corresponding YMM register are
zeroed.
Ref. # 319433-014 5-83