Intel® Architecture Instruction Set Extensions Programming Reference

INSTRUCTION SET REFERENCE - FMA
VFMADD132SD/VFMADD213SD/VFMADD231SD — Fused Multiply-Add of Scalar Double-
Precision Floating-Point Values
Opcode/
Instruction
VEX.DDS.LIG.128.66.0F38.W1
99 /r
VFMADD132SD xmm0, xmm1,
xmm2/m64
VEX.DDS.LIG.128.66.0F38.W1
A9 /r
VFMADD213SD xmm0, xmm1,
xmm2/m64
VEX.DDS.LIG.128.66.0F38.W1
B9 /r
VFMADD231SD xmm0, xmm1,
xmm2/m64
Description
Op/
En
64/32
-bit
Mode
CPUID
Feature
Flag
Description
A V/V FMA Multiply scalar double-precision floating-point value from xmm0 and
xmm2/mem, add to xmm1 and put result in xmm0.
A V/V FMA Multiply scalar double-precision floating-point value from xmm0 and
xmm1, add to xmm2/mem and put result in xmm0.
A V/V FMA Multiply scalar double-precision floating-point value from xmm1 and
xmm2/mem, add to xmm0 and put result in xmm0.
Instruction Operand Encoding
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (r, w) VEX.vvvv (r) ModRM:r/m (r) NA
Performs a SIMD multiply-add computation on the low packed double-precision floating-point values using three
source operands and writes the multiply-add result in the destination operand. The destination operand is also the
first source operand. The second operand must be a SIMD register. The third source operand can be a SIMD
register or a memory location.
VFMADD132SD: Multiplies the low packed double-precision floating-point value from the first source operand to
the low packed double-precision floating-point value in the third source operand, adds the infinite precision intermediate
result to the low packed double-precision floating-point values in the second source operand, performs
rounding and stores the resulting packed double-precision floating-point value to the destination operand (first
source operand).
VFMADD213SD: Multiplies the low packed double-precision floating-point value from the second source operand to
the low packed double-precision floating-point value in the first source operand, adds the infinite precision intermediate
result to the low packed double-precision floating-point value in the third source operand, performs rounding
and stores the resulting packed double-precision floating-point value to the destination operand (first source
operand).
VFMADD231SD: Multiplies the low packed double-precision floating-point value from the second source to the low
packed double-precision floating-point value in the third source operand, adds the infinite precision intermediate
result to the low packed double-precision floating-point value in the first source operand, performs rounding and
stores the resulting packed double-precision floating-point value to the destination operand (first source operand).
VEX.128 encoded version: The destination operand (also first source operand) is a XMM register and encoded in
reg_field. The second source operand is a XMM register and encoded in VEX.vvvv. The third source operand is a
XMM register or a 64-bit memory location and encoded in rm_field. The upper bits ([255:128]) of the YMM destination
register are zeroed.
Compiler tools may optionally support a complementary mnemonic for each instruction mnemonic listed in the
opcode/instruction column of the summary table. The behavior of the complementary mnemonic in situations
involving NANs are governed by the definition of the instruction mnemonic defined in the opcode/instruction
column. See also Section 2.3.1, “FMA Instruction Operand Order and Arithmetic Behavior”.
6-8 Ref. # 319433-014