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Intel® Architecture Instruction Set Extensions Programming Reference

Intel® Architecture Instruction Set Extensions Programming Reference

Intel® Architecture Instruction Set Extensions Programming Reference

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PSIGNB (128-bit Legacy SSE version)<br />

DEST[127:0] BYTE_SIGN(DEST, SRC)<br />

DEST[VLMAX:128] (Unmodified)<br />

VPSIGNW (VEX.256 encoded version)<br />

DEST[255:0] WORD_SIGN(SRC1, SRC2)<br />

VPSIGNW (VEX.128 encoded version)<br />

DEST[127:0] WORD_SIGN(SRC1, SRC2)<br />

DEST[VLMAX:128] 0<br />

PSIGNW (128-bit Legacy SSE version)<br />

DEST[127:0] WORD_SIGN(DEST, SRC)<br />

DEST[VLMAX:128] (Unmodified)<br />

VPSIGND (VEX.256 encoded version)<br />

DEST[255:0] DWORD_SIGN(SRC1, SRC2)<br />

VPSIGND (VEX.128 encoded version)<br />

DEST[127:0] DWORD_SIGN(SRC1, SRC2)<br />

DEST[VLMAX:128] 0<br />

PSIGND (128-bit Legacy SSE version)<br />

DEST[127:0] DWORD_SIGN(DEST, SRC)<br />

DEST[VLMAX:128] (Unmodified)<br />

Intel C/C++ Compiler Intrinsic Equivalent<br />

(V)PSIGNB: __m128i _mm_sign_epi8 (__m128i a, __m128i b)<br />

(V)PSIGNW: __m128i _mm_sign_epi16 (__m128i a, __m128i b)<br />

(V)PSIGND: __m128i _mm_sign_epi32 (__m128i a, __m128i b)<br />

VPSIGNB: __m256i _mm256_sign_epi8 (__m256i a, __m256i b)<br />

VPSIGNW: __m256i _mm256_sign_epi16 (__m256i a, __m256i b)<br />

VPSIGND: __m256i _mm256_sign_epi32 (__m256i a, __m256i b)<br />

SIMD Floating-Point Exceptions<br />

None<br />

Other Exceptions<br />

See Exceptions Type 4<br />

INSTRUCTION SET REFERENCE<br />

Ref. # 319433-014 5-131

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