Intel® Architecture Instruction Set Extensions Programming Reference

APPLICATION PROGRAMMING MODEL
Scalar FMA instructions only perform one arithmetic operation on the low order data element. The content of the
rest of the data elements in the lower 128-bits of the destination operand is preserved. the upper 128bits of the
destination operand are filled with zero.
An arithmetic FMA operation of the form, r=(x*y)+z, takes two IEEE-754-2008 single (double) precision values
and multiplies them to form an infinite precision intermediate value. This intermediate value is added to a third
single (double) precision value (also at infinite precision) and rounded to produce a single (double) precision result.
Table 2-2 describes the numerical behavior of the FMA operation, r=(x*y)+z, r=(x*y)-z, r=-(x*y)+z, r=-(x*y)-z
for various input values. The input values can be 0, finite non-zero (F in Table 2-2), infinity of either sign (INF in
Table 2-2), positive infinity (+INF in Table 2-2), negative infinity (-INF in Table 2-2), or NaN (including QNaN or
SNaN). If any one of the input values is a NAN, the result of FMA operation, r, may be a quietized NAN. The result
can be either Q(x), Q(y), or Q(z), see Table 2-2. If x is a NaN, then:
• Q(x) = x if x is QNaN or
• Q(x) = the quietized NaN obtained from x if x is SNaN
The notation for the output value in Table 2-2 are:
• “+INF”: positive infinity, “-INF”: negative infinity. When the result depends on a conditional expression, both
values are listed in the result column and the condition is described in the comment column.
• QNaNIndefinite represents the QNaN which has the sign bit equal to 1, the most significand field equal to 1, and
the remaining significand field bits equal to 0.
• The summation or subtraction of 0s or identical values in FMA operation can lead to the following situations
shown in Table 2-1
• If the FMA computation represents an invalid operation (e.g. when adding two INF with opposite signs)), the
invalid exception is signaled, and the MXCSR.IE flag is set.
Table 2-1. Rounding behavior of Zero Result in FMA Operation
x*y z (x*y) + z (x*y) - z - (x*y) + z - (x*y) - z
(+0) (+0)
(+0) (-0)
(-0) (+0)
(-0) (-0)
F -F
F F
+0 in all rounding modes - 0 when rounding down,
and +0 otherwise
- 0 when rounding down,
and +0 otherwise
- 0 when rounding down,
and +0 otherwise
- 0 in all rounding modes - 0 when rounding down,
and +0 otherwise
- 0 when rounding down,
and +0 otherwise
2*F - 0 when rounding down,
and +0 otherwise
- 0 when rounding down,
and +0 otherwise
- 0 in all rounding modes
+0 in all rounding modes - 0 in all rounding modes - 0 when rounding down,
and +0 otherwise
- 0 in all rounding modes + 0 in all rounding modes - 0 when rounding down,
and +0 otherwise
- 0 when rounding down,
and +0 otherwise
+ 0 in all rounding modes
2*F -2*F - 0 when rounding down,
and +0 otherwise
- 0 when rounding down,
and +0 otherwise
2-6 Ref. # 319433-014
-2*F