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Intel® Architecture Instruction Set Extensions Programming Reference

Intel® Architecture Instruction Set Extensions Programming Reference

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VEXTRACTI128 — Extract packed Integer Values<br />

Opcode/<br />

<strong>Instruction</strong><br />

Description<br />

<strong>Instruction</strong> Operand Encoding<br />

INSTRUCTION SET REFERENCE<br />

Extracts 128-bits of packed integer values from the source operand (second operand) at a 128-bit offset from<br />

imm8[0] into the destination operand (first operand). The destination may be either an XMM register or a 128-bit<br />

memory location.<br />

VEX.vvvv is reserved and must be 1111b otherwise instructions will #UD.<br />

The high 7 bits of the immediate are ignored.<br />

An attempt to execute VEXTRACTI128 encoded with VEX.L= 0 will cause an #UD exception.<br />

Operation<br />

VEXTRACTI128 (memory destination form)<br />

CASE (imm8[0]) OF<br />

0: DEST[127:0] SRC1[127:0]<br />

1: DEST[127:0] SRC1[255:128]<br />

ESAC.<br />

VEXTRACTI128 (register destination form)<br />

CASE (imm8[0]) OF<br />

0: DEST[127:0] SRC1[127:0]<br />

1: DEST[127:0] SRC1[255:128]<br />

ESAC.<br />

DEST[VLMAX:128] 0<br />

Intel C/C++ Compiler Intrinsic Equivalent<br />

VEXTRACTI128: __m128i _mm256_extracti128_si256(__m256i a, int offset);<br />

SIMD Floating-Point Exceptions<br />

None<br />

Other Exceptions<br />

Op/<br />

En<br />

See Exceptions Type 6; additionally<br />

#UD IF VEX.L = 0,<br />

If VEX.W = 1.<br />

64/32<br />

-bit<br />

Modet<br />

CPUID<br />

Feature<br />

Flag<br />

Description<br />

VEX.256.66.0F3A.W0 39 /r ib A V/V AVX2 Extract 128 bits of integer data from ymm2 and store results in<br />

xmm1/mem.<br />

VEXTRACTI128<br />

xmm1/m128, ymm2, imm8<br />

Op/En Operand 1 Operand 2 Operand 3 Operand 4<br />

A ModRM:r/m (w) ModRM:reg (r) NA NA<br />

Ref. # 319433-014 5-191

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