Intel® Architecture Instruction Set Extensions Programming Reference

INSTRUCTION SET REFERENCE
PSIGNB/PSIGNW/PSIGND — Packed SIGN
Opcode/
Instruction
Description
Op/
En
64/32
-bit
Mode
CPUID
Feature
Flag
Description
66 0F 38 08 /r A V/V SSSE3 Negate packed byte integers in xmm1 if the corresponding sign in
xmm2/m128 is less than zero.
PSIGNB xmm1, xmm2/m128
66 0F 38 09 /r A V/V SSSE3 Negate packed 16-bit integers in xmm1 if the corresponding sign
in xmm2/m128 is less than zero.
PSIGNW xmm1, xmm2/m128
66 0F 38 0A /r A V/V SSSE3 Negate packed doubleword integers in xmm1 if the corresponding
sign in xmm2/m128 is less than zero.
PSIGND xmm1, xmm2/m128
VEX.NDS.128.66.0F38.WIG 08 /r B V/V AVX Negate packed byte integers in xmm2 if the corresponding sign in
xmm3/m128 is less than zero.
VPSIGNB xmm1, xmm2,
xmm3/m128
VEX.NDS.128.66.0F38.WIG 09 /r B V/V AVX Negate packed 16-bit integers in xmm2 if the corresponding sign
in xmm3/m128 is less than zero.
VPSIGNW xmm1, xmm2,
xmm3/m128
VEX.NDS.128.66.0F38.WIG 0A /r B V/V AVX Negate packed doubleword integers in xmm2 if the corresponding
sign in xmm3/m128 is less than zero.
VPSIGND xmm1, xmm2,
xmm3/m128
VEX.NDS.256.66.0F38.WIG 08 /r B V/V AVX2 Negate packed byte integers in ymm2 if the corresponding sign in
ymm3/m256 is less than zero.
VPSIGNB ymm1, ymm2,
ymm3/m256
VEX.NDS.256.66.0F38.WIG 09 /r B V/V AVX2 Negate packed 16-bit integers in ymm2 if the corresponding sign
in ymm3/m256 is less than zero.
VPSIGNW ymm1, ymm2,
ymm3/m256
VEX.NDS.256.66.0F38.WIG 0A /r B V/V AVX2 Negate packed doubleword integers in ymm2 if the corresponding
sign in ymm3/m256 is less than zero.
VPSIGND ymm1, ymm2,
ymm3/m256
Instruction Operand Encoding
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (r, w) ModRM:r/m (r) NA NA
B ModRM:reg (w) VEX.vvvv ModRM:r/m (r) NA
(V)PSIGNB/(V)PSIGNW/(V)PSIGND negates each data element of the first source operand if the sign of the corresponding
data element in the second source operand is less than zero. If the sign of a data element in the second
source operand is positive, the corresponding data element in the first source operand is unchanged. If a data
element in the second source operand is zero, the corresponding data element in the first source operand is set to
zero.
(V)PSIGNB operates on signed bytes. (V)PSIGNW operates on 16-bit signed words. (V)PSIGND operates on signed
32-bit integers.
Legacy SSE instructions: In 64-bit mode use the REX prefix to access additional registers.
5-128 Ref. # 319433-014