Intel® Architecture Instruction Set Extensions Programming Reference

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$Intel® Math Kernel Library (Intel® MKL) 11.0 Release Notes$

$Intel® Math Kernel Library 11.0 Support for Intel® Xeon Phi ...$

0 1 2 3 4 5 6 7 Table A-3. Two-byte Opcode Map: 08H — 7FH (First Byte is 0FH) * pfx 8 9 A B C D E F 66 F3 F2 66 F3 F2 66 F3 66 F3 F2 INVD WBINVD 2-byte Illegal Opcodes UD2 1B Prefetch 1C (Grp 16 1A ) vmovaps Vps, Wps vmovapd Vpd, Wpd 3-byte escape (Table A-4) vmovaps Wps, Vps vmovapd Wpd,Vpd cvtpi2ps Vps, Qpi cvtpi2pd Vpd, Qpi vcvtsi2ss Vss, Hss, Ey vcvtsi2sd Vsd, Hsd, Ey 3-byte escape (Table A-5) vmovntps Mps, Vps vmovntpd Mpd, Vpd cvttps2pi Ppi, Wps cvttpd2pi Ppi, Wpd vcvttss2si Gy, Wss vcvttsd2si Gy, Wsd prefetchw(/1) Ev cvtps2pi Ppi, Wps cvtpd2pi Qpi, Wpd vcvtss2si Gy, Wss vcvtsd2si Gy, Wsd vucomiss Vss, Wss vucomisd Vsd, Wsd OPCODE MAP NOP /0 Ev vcomiss Vss, Wss vcomisd Vsd, Wsd CMOVcc(Gv, Ev) - Conditional Move S NS P/PE NP/PO L/NGE NL/GE LE/NG NLE/G vaddps Vps, Hps, Wps vaddpd Vpd, Hpd, Wpd vaddss Vss, Hss, Wss vaddsd Vsd, Hsd, Wsd punpckhbw Pq, Qd vpunpckhbw Vx, Hx, Wx VMREAD Ey, Gy vmulps Vps, Hps, Wps vmulpd Vpd, Hpd, Wpd vmulss Vss, Hss, Wss vmulsd Vsd, Hsd, Wsd punpckhwd Pq, Qd vpunpckhwd Vx, Hx, Wx VMWRITE Gy, Ey vcvtps2pd Vpd, Wps vcvtpd2ps Vps, Wpd vcvtss2sd Vsd, Hx, Wss vcvtsd2ss Vss, Hx, Wsd punpckhdq Pq, Qd vpunpckhdq Vx, Hx, Wx vcvtdq2ps Vps, Wdq vcvtps2dq Vdq, Wps vcvttps2dq Vdq, Wps packssdw Pq, Qd vpackssdw Vx, Hx, Wx vsubps Vps, Hps, Wps vsubpd Vpd, Hpd, Wpd vsubss Vss, Hss, Wss vsubsd Vsd, Hsd, Wsd vpunpcklqdq Vx, Hx, Wx vhaddpd Vpd, Hpd, Wpd vhaddps Vps, Hps, Wps vminps Vps, Hps, Wps vminpd Vpd, Hpd, Wpd vminss Vss, Hss, Wss vminsd Vsd, Hsd, Wsd vpunpckhqdq Vx, Hx, Wx vhsubpd Vpd, Hpd, Wpd vhsubps Vps, Hps, Wps vdivps Vps, Hps, Wps vdivpd Vpd, Hpd, Wpd vdivss Vss, Hss, Wss vdivsd Vsd, Hsd, Wsd vmaxps Vps, Hps, Wps vmaxpd Vpd, Hpd, Wpd vmaxss Vss, Hss, Wss vmaxsd Vsd, Hsd, Wsd Ref. # 319433-014 A-11 movd/q Pd, Ey vmovd/q Vy, Ey movd/q Ey, Pd vmovd/q Ey, Vy vmovq Vq, Wq movq Pq, Qq vmovdqa Vx, Wx vmovdqu Vx, Wx movq Qq, Pq vmovdqa Wx,Vx vmovdqu Wx,Vx
OPCODE MAP 8 9 A B C D E F Table A-3. Two-byte Opcode Map: 80H — F7H (First Byte is 0FH) * pfx 0 1 2 3 4 5 6 7 66 F3 F2 66 F3 F2 66 F3 F2 66 F2 Jccf64 , Jz - Long-displacement jump on condition O NO B/CNAE AE/NB/NC E/Z NE/NZ BE/NA A/NBE SETcc, Eb - Byte <strong>Set</strong> on condition O NO B/C/NAE AE/NB/NC E/Z NE/NZ BE/NA A/NBE PUSH d64 FS POP d64 FS CPUID BT Ev, Gv SHLD Ev, Gv, Ib SHLD Ev, Gv, CL CMPXCHG LSS BTR LFS LGS MOVZX Eb, Gb Ev, Gv Gv, Mp Ev, Gv Gv, Mp Gv, Mp Gv, Eb Gv, Ew XADD Eb, Gb vaddsubpd Vpd, Hpd, Wpd vaddsubps Vps, Hps, Wps pavgb Pq, Qq vpavgb Vx, Hx, Wx vlddqu Vx, Mx XADD Ev, Gv psrlw Pq, Qq vpsrlw Vx, Hx, Wx psraw Pq, Qq vpsraw Vx, Hx, Wx psllw Pq, Qq vpsllw Vx, Hx, Wx vcmpps Vps,Hps,Wps,Ib vcmppd Vpd,Hpd,Wpd,Ib vcmpss Vss,Hss,Wss,Ib vcmpsd Vsd,Hsd,Wsd,Ib psrld Pq, Qq vpsrld Vx, Hx, Wx psrad Pq, Qq vpsrad Vx, Hx, Wx pslld Pq, Qq vpslld Vx, Hx, Wx movnti My, Gy psrlq Pq, Qq vpsrlq Vx, Hx, Wx pavgw Pq, Qq vpavgw Vx, Hx, Wx psllq Pq, Qq vpsllq Vx, Hx, Wx pinsrw Pq,Ry/Mw,Ib vpinsrw Vdq,Hdq,Ry/Mw,Ib pextrw Gd, Nq, Ib vpextrw Gd, Udq, Ib vshufps Vps,Hps,Wps,Ib vshufpd Vpd,Hpd,Wpd,Ib A-12 Ref. # 319433-014 paddq Pq, Qq vpaddq Vx, Hx, Wx pmulhuw Pq, Qq vpmulhuw Vx, Hx, Wx pmuludq Pq, Qq vpmuludq Vx, Hx, Wx pmullw Pq, Qq vpmullw Vx, Hx, Wx pmulhw Pq, Qq vpmulhw Vx, Hx, Wx pmaddwd Pq, Qq vpmaddwd Vx, Hx, Wx vmovq Wq, Vq movq2dq Vdq, Nq movdq2q Pq, Uq vcvttpd2dq Vx, Wpd vcvtdq2pd Vx, Wpd vcvtpd2dq Vx, Wpd psadbw Pq, Qq vpsadbw Vx, Hx, Wx Grp 9 1A pmovmskb Gd, Nq vpmovmskb Gd, Ux movntq Mq, Pq vmovntdq Mx, Vx maskmovq Pq, Nq vmaskmovdqu Vdq, Udq
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Intel® Architecture Instruction Se
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CONTENTS CHAPTER 1 INTEL® ADVANCED
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PANDN — Logical AND NOT . . . . .
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BZHI — Zero High Bits Starting wi
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TABLES 2-1 Rounding behavior of Zer
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FIGURES Figure 2-1. General Procedu
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INTEL® ADVANCED VECTOR EXTENSIONS
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APPLICATION PROGRAMMING MODEL Prior
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APPLICATION PROGRAMMING MODEL } and
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APPLICATION PROGRAMMING MODEL Scala
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APPLICATION PROGRAMMING MODEL x (mu
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APPLICATION PROGRAMMING MODEL Instr
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APPLICATION PROGRAMMING MODEL Table
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APPLICATION PROGRAMMING MODEL Excep
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APPLICATION PROGRAMMING MODEL 2.7.2
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APPLICATION PROGRAMMING MODEL EAX 3
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APPLICATION PROGRAMMING MODEL • T
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APPLICATION PROGRAMMING MODEL How B
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APPLICATION PROGRAMMING MODEL
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APPLICATION PROGRAMMING MODEL EAX[1
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APPLICATION PROGRAMMING MODEL EBX
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SYSTEM PROGRAMMING MODEL • Verify
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SYSTEM PROGRAMMING MODEL The proces
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SYSTEM PROGRAMMING MODEL 3.3 RESET
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INSTRUCTION FORMAT 4.1.1 VEX and th
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INSTRUCTION FORMAT (Bit Position) 7
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INSTRUCTION FORMAT The VEX.vvvv fie
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INSTRUCTION FORMAT 4.1.8 The Third
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INSTRUCTION FORMAT NOTES: 1. If Mod
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INSTRUCTION SET REFERENCE (V)ADDSD
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INSTRUCTION SET REFERENCE register
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INSTRUCTION SET REFERENCE MPSADBW
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INSTRUCTION SET REFERENCE SRC2_BYTE
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INSTRUCTION SET REFERENCE VMPSADBW
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INSTRUCTION SET REFERENCE DEST[79:6
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INSTRUCTION SET REFERENCE Operation
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INSTRUCTION SET REFERENCE PACKSSWB/
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INSTRUCTION SET REFERENCE PACKUSDW
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INSTRUCTION SET REFERENCE TMP[239:2
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INSTRUCTION SET REFERENCE DEST[119:
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INSTRUCTION SET REFERENCE PADDB/PAD
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INSTRUCTION SET REFERENCE PADDQ (Le
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INSTRUCTION SET REFERENCE PADDSB/PA
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INSTRUCTION SET REFERENCE PADDUSB/P
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INSTRUCTION SET REFERENCE PALIGNR
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INSTRUCTION SET REFERENCE PAND —
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INSTRUCTION SET REFERENCE PANDN —
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INSTRUCTION SET REFERENCE PAVGB/PAV
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INSTRUCTION SET REFERENCE PBLENDVB
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INSTRUCTION SET REFERENCE IF (MASK[
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INSTRUCTION SET REFERENCE PBLENDW
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INSTRUCTION SET REFERENCE ELSE DEST
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INSTRUCTION SET REFERENCE Descripti
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INSTRUCTION SET REFERENCE PCMPEQQ (
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INSTRUCTION SET REFERENCE Intel C/C
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INSTRUCTION SET REFERENCE PHADDSW
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INSTRUCTION SET REFERENCE PHSUBW/PH
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INSTRUCTION SET REFERENCE PMADDUBSW
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INSTRUCTION SET REFERENCE VPMADDWD
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INSTRUCTION SET REFERENCE VEX.128 e
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INSTRUCTION SET REFERENCE VPMINUD (
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INSTRUCTION SET REFERENCE PMOVMSKB
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INSTRUCTION SET REFERENCE Opcode/ I
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INSTRUCTION SET REFERENCE VPMOVSXWQ
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INSTRUCTION SET REFERENCE PMOVZX
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INSTRUCTION SET REFERENCE Packed_Ze
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INSTRUCTION SET REFERENCE Other Exc
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INSTRUCTION SET REFERENCE temp13[31
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INSTRUCTION SET REFERENCE PMULHUW
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INSTRUCTION SET REFERENCE PMULLW/PM
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INSTRUCTION SET REFERENCE Temp10[31
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INSTRUCTION SET REFERENCE PMULUDQ
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INSTRUCTION SET REFERENCE POR — B
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INSTRUCTION SET REFERENCE PSADBW
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INSTRUCTION SET REFERENCE PSHUFB
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INSTRUCTION SET REFERENCE PSHUFD
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INSTRUCTION SET REFERENCE PSHUFHW
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INSTRUCTION SET REFERENCE PSHUFLW
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INSTRUCTION SET REFERENCE PSIGNB/PS
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INSTRUCTION SET REFERENCE DEST[255.
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INSTRUCTION SET REFERENCE PSLLDQ
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INSTRUCTION SET REFERENCE PSLLW/PSL
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INSTRUCTION SET REFERENCE PSLLD (xm
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INSTRUCTION SET REFERENCE PSRAW/PSR
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INSTRUCTION SET REFERENCE COUNT 31
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INSTRUCTION SET REFERENCE PSRLDQ
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INSTRUCTION SET REFERENCE PSRLW/PSR
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INSTRUCTION SET REFERENCE FI; DEST[
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INSTRUCTION SET REFERENCE VPSRLQ (x
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INSTRUCTION SET REFERENCE PSUBSB/PS
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INSTRUCTION SET REFERENCE PSUBUSB/P
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INSTRUCTION SET REFERENCE PUNPCKHBW
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INSTRUCTION SET REFERENCE VPUNPCKHW
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INSTRUCTION SET REFERENCE Instructi
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INSTRUCTION SET REFERENCE INTERLEAV
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INSTRUCTION SET REFERENCE VPUNPCKLD
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INSTRUCTION SET REFERENCE SIMD Floa
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INSTRUCTION SET REFERENCE VBROADCAS
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INSTRUCTION SET REFERENCE VPBLENDD
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INSTRUCTION SET REFERENCE VPBROADCA
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INSTRUCTION SET REFERENCE VPERMPD
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INSTRUCTION SET REFERENCE VPERMQ
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INSTRUCTION SET REFERENCE VINSERTI1
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INSTRUCTION SET REFERENCE The secon
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INSTRUCTION SET REFERENCE VPSLLVD/V
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INSTRUCTION SET REFERENCE Other Exc
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INSTRUCTION SET REFERENCE VPSRAVD (
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INSTRUCTION SET REFERENCE VPSRLVD (
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INSTRUCTION SET REFERENCE VGATHERDP
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INSTRUCTION SET REFERENCE VGATHERQP
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INSTRUCTION SET REFERENCE VGATHERDP
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INSTRUCTION SET REFERENCE VGATHERQP
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INSTRUCTION SET REFERENCE VPGATHERD
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INSTRUCTION SET REFERENCE VPGATHERQ
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INSTRUCTION SET REFERENCE VPGATHERD
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INSTRUCTION SET REFERENCE VPGATHERQ
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INSTRUCTION SET REFERENCE This page
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INSTRUCTION SET REFERENCE - FMA VFM
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INSTRUCTION SET REFERENCE - FMA For
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INSTRUCTION SET REFERENCE - FMA sou
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INSTRUCTION SET REFERENCE - FMA Int
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INSTRUCTION SET REFERENCE - FMA the
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INSTRUCTION SET REFERENCE - FMA the
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INSTRUCTION SET REFERENCE - FMA } I
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INSTRUCTION SET REFERENCE - FMA ope
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INSTRUCTION SET REFERENCE - FMA VFN
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INSTRUCTION SET REFERENCE - FMA VEX
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INSTRUCTION SET REFERENCE - FMA VEX
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INSTRUCTION SET REFERENCE - FMA Thi
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INSTRUCTION SET REFERENCE - VEX-ENC
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Page 379 and 380: INSTRUCTION SET REFERENCE - VEX-ENC
Page 387 and 388: INTEL® TRANSACTIONAL SYNCHRONIZATI
Page 407 and 408: ADDITIONAL NEW INSTRUCTIONS -------
Page 409 and 410: ADDITIONAL NEW INSTRUCTIONS • If
Page 411 and 412: ADDITIONAL NEW INSTRUCTIONS ADCX
Page 413 and 414: ADDITIONAL NEW INSTRUCTIONS ADOX
Page 415 and 416: ADDITIONAL NEW INSTRUCTIONS Compati
Page 417 and 418: ADDITIONAL NEW INSTRUCTIONS Flags A
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Page 421 and 422: OPCODE MAP D The reg field of the M
Page 423 and 424: OPCODE MAP • A ModR/M byte is req
Page 425 and 426: OPCODE MAP A.2.5 Superscripts Utili
Page 427 and 428: OPCODE MAP Table A-2. One-byte Opco
Page 429: OPCODE MAP 0 1 2 3 4 5 6 7 Table A-
Page 433 and 434: OPCODE MAP 0 Table A-4. Three-byte
Page 435 and 436: OPCODE MAP 0 66 1 66 2 66 3 4 66 5
Page 437 and 438: OPCODE MAP A.4 OPCODE EXTENSIONS FO
Page 439 and 440: OPCODE MAP Opcode Group Mod 7,6 pfx
Page 441 and 442: OPCODE MAP Table A-8 shows the map
Page 447 and 448: OPCODE MAP Table A-20 shows the opc
Page 449 and 450: OPCODE MAP This page was intentiona
Page 451 and 452: INSTRUCTION SUMMARY VEX.256 Encodin
Page 457 and 458: INSTRUCTION SUMMARY Note 3: It is e
Page 459 and 460: INSTRUCTION SUMMARY Table B-2. Prom
Page 461 and 462: INSTRUCTION SUMMARY Table B-3. VEX-
Page 463 and 464: INSTRUCTION SUMMARY Opcode Instruct
Page 473 and 474: SSE extensions flag . . . . . . . .
Page 475 and 476: SSE extensions CPUID flag . . . . .
Page 477: I-6 Ref. # 319433-014
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Intel® Architecture Instruction Set Extensions Programming Reference

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