Intel® Architecture Instruction Set Extensions Programming Reference

INSTRUCTION SET REFERENCE - FMA
VFMSUB132PD/VFMSUB213PD/VFMSUB231PD — Fused Multiply-Subtract of Packed Double-
Precision Floating-Point Values
Opcode/
Instruction
Description
Op/
En
64/32
-bit
Mode
CPUID
Feature
Flag
Description
VEX.DDS.128.66.0F38.W1 9A /r A V/V FMA Multiply packed double-precision floating-point values from xmm0
and xmm2/mem, subtract xmm1 and put result in xmm0.
VFMSUB132PD xmm0, xmm1,
xmm2/m128
VEX.DDS.128.66.0F38.W1 AA /r A V/V FMA Multiply packed double-precision floating-point values from xmm0
and xmm1, subtract xmm2/mem and put result in xmm0.
VFMSUB213PD xmm0, xmm1,
xmm2/m128
VEX.DDS.128.66.0F38.W1 BA /r A V/V FMA Multiply packed double-precision floating-point values from xmm1
and xmm2/mem, subtract xmm0 and put result in xmm0.
VFMSUB231PD xmm0, xmm1,
xmm2/m128
VEX.DDS.256.66.0F38.W1 9A /r A V/V FMA Multiply packed double-precision floating-point values from ymm0
and ymm2/mem, subtract ymm1 and put result in ymm0.
VFMSUB132PD ymm0, ymm1,
ymm2/m256
VEX.DDS.256.66.0F38.W1 AA /r A V/V FMA Multiply packed double-precision floating-point values from ymm0
and ymm1, subtract ymm2/mem and put result in ymm0.
VFMSUB213PD ymm0, ymm1,
ymm2/m256
VEX.DDS.256.66.0F38.W1 BA /r A V/V FMA Multiply packed double-precision floating-point values from ymm1
and ymm2/mem, subtract ymm0 and put result in ymm0.
VFMSUB231PD ymm0, ymm1,
ymm2/m256
Instruction Operand Encoding
Op/En Operand 1 Operand 2 Operand 3 Operand 4
A ModRM:reg (r, w) VEX.vvvv (r) ModRM:r/m (r) NA
Performs a set of SIMD multiply-subtract computation on packed double-precision floating-point values using three
source operands and writes the multiply-subtract results in the destination operand. The destination operand is
also the first source operand. The second operand must be a SIMD register. The third source operand can be a
SIMD register or a memory location.
VFMSUB132PD: Multiplies the two or four packed double-precision floating-point values from the first source
operand to the two or four packed double-precision floating-point values in the third source operand. From the infinite
precision intermediate result, subtracts the two or four packed double-precision floating-point values in the
second source operand, performs rounding and stores the resulting two or four packed double-precision floatingpoint
values to the destination operand (first source operand).
VFMSUB213PD: Multiplies the two or four packed double-precision floating-point values from the second source
operand to the two or four packed double-precision floating-point values in the first source operand. From the infinite
precision intermediate result, subtracts the two or four packed double-precision floating-point values in the
third source operand, performs rounding and stores the resulting two or four packed double-precision floatingpoint
values to the destination operand (first source operand).
VFMSUB231PD: Multiplies the two or four packed double-precision floating-point values from the second source to
the two or four packed double-precision floating-point values in the third source operand. From the infinite precision
intermediate result, subtracts the two or four packed double-precision floating-point values in the first source
operand, performs rounding and stores the resulting two or four packed double-precision floating-point values to
6-24 Ref. # 319433-014