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Intel® Architecture Instruction Set Extensions Programming Reference

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INSTRUCTION SUMMARY<br />

VEX.256<br />

Encoding<br />

VEX.128<br />

Encoding<br />

Table B-1. Promoted SSE/SSE2/SSE3/SSSE3/SSE4 <strong>Instruction</strong>s in AVX<br />

Group <strong>Instruction</strong> If No, Reason?<br />

no yes YY 0F 7X PSHUFD VI<br />

no yes PSHUFHW VI<br />

no yes PSHUFLW VI<br />

no yes PCMPEQB VI<br />

no yes PCMPEQW VI<br />

no yes PCMPEQD VI<br />

yes yes HADDPD<br />

yes yes HADDPS<br />

yes yes HSUBPD<br />

yes yes HSUBPS<br />

no yes MOVD VI<br />

no yes MOVQ VI<br />

yes yes MOVDQA<br />

yes yes MOVDQU<br />

no yes YY 0F AX LDMXCSR<br />

no yes STMXCSR<br />

yes yes YY 0F CX CMPPS<br />

no yes CMPSS scalar<br />

yes yes CMPPD<br />

no yes CMPSD scalar<br />

no yes PINSRW VI<br />

no yes PEXTRW VI<br />

yes yes SHUFPS<br />

yes yes SHUFPD<br />

yes yes YY 0F DX ADDSUBPD<br />

yes yes ADDSUBPS<br />

no yes PSRLW VI<br />

no yes PSRLD VI<br />

no yes PSRLQ VI<br />

no yes PADDQ VI<br />

no yes PMULLW VI<br />

no no MOVQ2DQ MMX<br />

no no MOVDQ2Q MMX<br />

no yes PMOVMSKB VI<br />

no yes PSUBUSB VI<br />

no yes PSUBUSW VI<br />

no yes PMINUB VI<br />

no yes PAND VI<br />

B-4 Ref. # 319433-014

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