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AMD 64-Bit Technology - ECE User Home Pages

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26568—Rev. 3.02—August 2002<br />

<strong>AMD</strong> <strong>64</strong>-<strong>Bit</strong> <strong>Technology</strong><br />

PACKSSDW<br />

Pack with Saturation Signed Doubleword to<br />

Word<br />

Converts each 32-bit signed integer in the first and second source operands to a 16-bit<br />

signed integer and packs the converted values into words in the destination (first<br />

source). The first source/destination operand is an XMM register and the second<br />

source operand is another XMM register or 128-bit memory location.<br />

Converted values from the first source operand are packed into the low-order words of<br />

the destination, and the converted values from the second source operand are packed<br />

into the high-order words of the destination.<br />

Mnemonic Opcode Description<br />

PACKSSDW xmm1, xmm2/mem128 66 0F 6B /r Packs 32-bit signed integers in an XMM register and another<br />

XMM register or 128-bit memory location into 16-bit signed<br />

integers in an XMM register.<br />

xmm1<br />

xmm2/mem128<br />

127 96 95 <strong>64</strong> 63 32 31<br />

0<br />

127 96 95 <strong>64</strong> 63 32 31<br />

0<br />

convert<br />

. . .<br />

.<br />

convert convert convert<br />

.<br />

.<br />

.<br />

.<br />

127 112 111 96 95 80 79 <strong>64</strong> 63 48 47 32 31 16 15 0<br />

packssdw-128.eps<br />

For each packed value in the destination, if the value is larger than the largest signed<br />

16-bit integer, it is saturated to 7FFFh, and if the value is smaller than the smallest<br />

signed 16-bit integer, it is saturated to 8000h.<br />

Related Instructions<br />

PACKSSWB, PACKUSWB<br />

PACKSSDW 205

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