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AMD 64-Bit Technology - ECE User Home Pages

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<strong>AMD</strong> <strong>64</strong>-<strong>Bit</strong> <strong>Technology</strong> 26568—Rev. 3.02—August 2002<br />

PSUBD<br />

Packed Subtract Doublewords<br />

Subtracts each packed 32-bit integer value in the second source operand from the<br />

corresponding packed 32-bit integer in the first source operand and writes the integer<br />

result of each subtraction in the corresponding doubleword of the destination (first<br />

source). The first source/destination operand is an XMM register and the second<br />

source operand is another XMM register or 128-bit memory location.<br />

Mnemonic Opcode Description<br />

PSUBD xmm1, xmm2/mem128 66 0F FA /r Subtracts packed 32-bit integer values in an XMM register or 128-<br />

bit memory location from packed 32-bit integer values in another<br />

XMM register and writes the result in the destination XMM<br />

register.<br />

xmm1<br />

. .<br />

127 96 95 <strong>64</strong> 63 32 31<br />

0<br />

xmm2/mem128<br />

127 96 95 <strong>64</strong> 63 32 31<br />

0<br />

subtract<br />

. .<br />

subtract<br />

. .<br />

psubd-128.eps<br />

This instruction operates on both signed and unsigned integers. If the result<br />

overflows, the carry is ignored (neither the overflow nor carry bit in rFLAGS is set),<br />

and only the low-order 32 bits of each result are written in the destination.<br />

Related Instructions<br />

PSUBB, PSUBQ, PSUBSB, PSUBSW, PSUBUSB, PSUBUSW, PSUBW<br />

rFLAGS Affected<br />

None<br />

310 PSUBD

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