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AMD 64-Bit Technology 26568—Rev. 3.02—August 2002 Exception Real Virtual 8086 Protected Cause of Exception Overflow exception (OE) X X X A rounded result was too large to fit into the format of the destination operand. Underflow exception (UE) X X X A rounded result was too small to fit into the format of the destination operand. Precision exception (PE) X X X A result could not be represented exactly in the destination format. 6 ADDPD
26568—Rev. 3.02—August 2002 AMD 64-Bit Technology ADDPS Add Packed Single-Precision Floating-Point Adds each packed single-precision floating-point value in the first source operand to the corresponding packed single-precision floating-point value in the second source operand and writes the result of each addition in the corresponding quadword of the destination (first source). The first source/destination operand is an XMM register. The second source operand is another XMM register or 128-bit memory location. Mnemonic Opcode Description ADDPS xmm1, xmm2/mem128 0F 58 /r Adds four packed single-precision floating-point values in an XMM register and another XMM register or 128-bit memory location and writes the result in the destination XMM register. xmm1 xmm2/mem128 127 96 95 64 63 32 31 0 127 96 95 64 63 32 31 0 add add add add addps.eps Related Instructions ADDPD, ADDSD, ADDSS rFLAGS Affected None ADDPS 7
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