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AMD 64-Bit Technology 26568—Rev. 3.02—August 2002 Exception Real Virtual 8086 Protected Cause of Exception Underflow exception (UE) X X X A rounded result was too small to fit into the format of the destination operand. Denormalized-operand X X X A source operand was a denormal value. exception (DE) Precision exception (PE) X X X A result could not be represented exactly in the destination format. 54 CVTPD2PS
26568—Rev. 3.02—August 2002 AMD 64-Bit Technology CVTPI2PD Convert Packed Doubleword Integers to Packed Double-Precision Floating-Point Converts two packed 32-bit signed integer values in an MMX register or a 64-bit memory location to two double-precision floating-point values and writes the converted values in an XMM register. Mnemonic Opcode Description CVTPI2PD xmm, mmx/mem64 66 0F 2A /r Converts two packed doubleword integer values in an MMX register or 64-bit memory location to two packed doubleprecision floating-point values in the destination XMM register. xmm mmx/mem64 127 64 63 0 63 32 31 0 convert convert cvtpi2pd.eps Related Instructions CVTDQ2PD, CVTPD2DQ, CVTPD2PI, CVTSD2SI, CVTSI2SD, CVTTPD2DQ, CVTTPD2PI, CVTTSD2SI rFLAGS Affected None MXCSR Flags Affected None CVTPI2PD 55
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