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AMD 64-Bit Technology 26568—Rev. 3.02—August 2002 PSRAW Packed Shift Right Arithmetic Words Right-shifts each of the packed 16-bit values in the first source operand by the number of bits specified in the second source operand and writes each shifted value in the corresponding word of the destination (first source). The first source/destination and second source operands are: „ an XMM register and another XMM register or 128-bit memory location, or „ an XMM register and an immediate byte value. The high-order bits that are emptied by the shift operation are filled with the sign bit of the word’s initial value. If the shift value is greater than 15, each word in the destination is filled with the sign bit of the word’s initial value. Mnemonic Opcode Description PSRAW xmm1, xmm2/mem128 66 0F E1 /r Right-shifts packed words in an XMM register by the amount specified in the low 64 bits of an XMM register or 128-bit memory location. PSRAW xmm, imm8 66 0F 71 /4 ib Right-shifts packed words in an XMM register by the amount specified in an immediate byte value. 296 PSRAW
26568—Rev. 3.02—August 2002 AMD 64-Bit Technology xmm1 xmm2/mem128 . . . . . . 127 112 111 96 95 80 79 64 63 48 47 32 31 16 15 0 127 64 63 0 . . . . . . shift right arithmetic shift right arithmetic xmm . . . . . . 127 112 111 96 95 80 79 64 63 48 47 32 31 16 15 0 imm8 7 0 . . . . . . shift right arithmetic shift right arithmetic psraw-128.eps Related Instructions PSLLD, PSLLDQ, PSLLQ, PSLLW, PSRAD, PSRLD, PSRLDQ, PSRLQ, PSRLW rFLAGS Affected None MXCSR Flags Affected None PSRAW 297
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