AMD 64-Bit Technology - ECE User Home Pages

26568—Rev. 3.02—August 2002
AMD 64-Bit Technology
Index
Numerics
16-bit mode.................................................. xii
32-bit mode................................................ xiii
64-bit mode................................................ xiii
A
ADDPD .......................................................... 4
ADDPS........................................................... 7
addressing, RIP-relative......................... xviii
ADDSD ........................................................ 10
ADDSS ......................................................... 12
ANDNPD ..................................................... 15
ANDNPS ...................................................... 17
ANDPD ........................................................ 19
ANDPS......................................................... 21
B
biased exponent........................................ xiii
C
CMPPD ........................................................ 23
CMPPS......................................................... 27
CMPSD ........................................................ 30
CMPSS ......................................................... 33
COMISD....................................................... 36
COMISS ....................................................... 39
commit ....................................................... xiii
compatibility mode................................... xiii
CVTDQ2PD ................................................. 42
CVTDQ2PS.................................................. 44
CVTPD2DQ ................................................. 46
CVTPD2PI ................................................... 49
CVTPD2PS .................................................. 52
CVTPI2PD ................................................... 55
CVTPI2PS.................................................... 57
CVTPS2DQ.................................................. 59
CVTPS2PD .................................................. 62
CVTPS2PI.................................................... 64
CVTSD2SI ................................................... 67
CVTSD2SS................................................... 70
CVTSI2SD ................................................... 73
CVTSI2SS .................................................... 76
CVTSS2SD................................................... 79
CVTSS2SI .................................................... 81
CVTTPD2DQ............................................... 84
CVTTPD2PI................................................. 87
CVTTPS2DQ ............................................... 90
CVTTPS2PI ................................................. 93
CVTTSD2SI ................................................. 96
CVTTSS2SI ................................................. 99
D
direct referencing...................................... xiv
displacements............................................ xiv
DIVPD ....................................................... 102
DIVPS........................................................ 105
DIVSD ....................................................... 108
DIVSS ........................................................ 110
double quadword....................................... xiv
doubleword ................................................ xiv
E
eAX–eSP register ....................................... xx
effective address size................................ xiv
effective operand size................................ xv
eFLAGS register......................................... xx
eIP register ................................................ xxi
element ....................................................... xv
endian order ............................................ xxiii
exception..................................................... xv
exponent .................................................... xiii
F
flush............................................................. xv
FXRSTOR ................................................. 113
FXSAVE .................................................... 115
I
IGN .............................................................. xv
indirect........................................................ xv
instructions
128-bit media ............................................. 1
SSE ............................................................. 1
SSE-2 .......................................................... 1
L
LDMXCSR ................................................ 117
legacy mode ............................................... xvi
legacy x86 .................................................. xvi
long mode................................................... xvi
LSB ............................................................. xvi
lsb ............................................................... xvi
M
mask ........................................................... xvi
MASKMOVDQU ....................................... 119
MAXPD ..................................................... 121
MAXPS...................................................... 123
MAXSD ..................................................... 126
MAXSS ...................................................... 128
Index 399