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AMD 64-Bit Technology - ECE User Home Pages

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26568—Rev. 3.02—August 2002<br />

<strong>AMD</strong> <strong>64</strong>-<strong>Bit</strong> <strong>Technology</strong><br />

UNPCKHPD<br />

Unpack High Double-Precision Floating-Point<br />

Unpacks the high-order double-precision floating-point values in the first and second<br />

source operands and packs them into quadwords in the destination (first source). The<br />

value from the first source operand is packed into the low-order quadword of the<br />

destination, and the value from the second source operand is packed into the highorder<br />

quadword of the destination. The low-order quadwords of the source operands<br />

are ignored. The first source/destination operand is an XMM register. The second<br />

source operand is another XMM register or 128-bit memory location.<br />

Mnemonic Opcode Description<br />

UNPCKHPD xmm1, xmm2/mem128 66 0F 15 /r Unpacks high-order double-precision floating-point values in<br />

an XMM register and another XMM register or 128-bit<br />

memory location and packs them into the destination XMM<br />

register.<br />

xmm1<br />

xmm2/mem128<br />

127 <strong>64</strong> 63 0<br />

127 <strong>64</strong> 63 0<br />

copy<br />

copy<br />

127<br />

<strong>64</strong> 63 0<br />

unpckhpd.eps<br />

Related Instructions<br />

UNPCKHPS, UNPCKLPD, UNPCKLPS<br />

rFLAGS Affected<br />

None<br />

MXCSR Flags Affected<br />

UNPCKHPD 387

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