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AMD 64-Bit Technology 26568—Rev. 3.02—August 2002 Exception Real Virtual 8086 Protected Cause of Exception Denormalized-operand X X X A source operand was a denormal value. exception (DE) Overflow exception (OE) X X X A rounded result was too large to fit into the format of the destination operand. Underflow exception (UE) X X X A rounded result was too small to fit into the format of the destination operand. Precision exception (PE) X X X A result could not be represented exactly in the destination format. 380 SUBSS
26568—Rev. 3.02—August 2002 AMD 64-Bit Technology UCOMISD Unordered Compare Scalar Double-Precision Floating-Point Performs an unordered compare of the double-precision floating-point value in the low-order 64 bits of an XMM register with the double-precision floating-point value in the low-order 64 bits of another XMM register or a 64-bit memory location and sets the ZF, PF, and CF bits in the rFLAGS register to reflect the result of the compare. The result is unordered if one or both of the operand values is a NaN. The OF, AF, and SF bits in rFLAGS are set to zero. If the instruction causes an unmasked SIMD floating-point exception (#XF), the rFLAGS bits are not updated. Mnemonic Opcode Description UCOMISD xmm1, xmm2/mem64 66 0F 2E /r Compares scalar double-precision floating-point values in an XMM register and an XMM register or 64-bit memory location. Sets rFLAGS. xmm1 127 64 63 0 xmm2/mem64 127 64 63 0 compare 63 0 31 rFLAGS 0 ucomisd.eps Result of Compare ZF PF CF Unordered 1 1 1 Greater Than 0 0 0 Less Than 0 0 1 Equal 1 0 0 UCOMISD 381
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