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AMD 64-Bit Technology - ECE User Home Pages

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26568—Rev. 3.02—August 2002<br />

<strong>AMD</strong> <strong>64</strong>-<strong>Bit</strong> <strong>Technology</strong><br />

PSRAD<br />

Packed Shift Right Arithmetic Doublewords<br />

Right-shifts each of the packed 32-bit values in the first source operand by the number<br />

of bits specified in the second source operand and writes each shifted value in the<br />

corresponding doubleword of the destination (first source). The first<br />

source/destination and second source operands are:<br />

„ an XMM register and another XMM register or 128-bit memory location, or<br />

„ an XMM register and an immediate byte value.<br />

The high-order bits that are emptied by the shift operation are filled with the sign bit<br />

of the doubleword’s initial value. If the shift value is greater than 31, each doubleword<br />

in the destination is filled with the sign bit of the doubleword’s initial value.<br />

Mnemonic Opcode Description<br />

PSRAD xmm1, xmm2/mem128 66 0F E2 /r Right-shifts packed doublewords in an XMM register by the<br />

amount specified in the low <strong>64</strong> bits of an XMM register or<br />

128-bit memory location.<br />

PSRAD xmm, imm8 66 0F 72 /4 ib Right-shifts packed doublewords in an XMM register by the<br />

amount specified in an immediate byte value.<br />

PSRAD 293

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