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AMD 64-Bit Technology 26568—Rev. 3.02—August 2002 Exception Real Virtual 8086 Protected Cause of Exception Denormalized-operand X X X A source operand was a denormal value. exception (DE) Overflow exception (OE) X X X A rounded result was too large to fit into the format of the destination operand. Underflow exception (UE) X X X A rounded result was too small to fit into the format of the destination operand. Precision exception (PE) X X X A result could not be represented exactly in the destination format. 374 SUBPS
26568—Rev. 3.02—August 2002 AMD 64-Bit Technology SUBSD Subtract Scalar Double-Precision Floating-Point Subtracts the double-precision floating-point value in the low-order quadword of the second source operand from the double-precision floating-point value in the low-order quadword of the first source operand and writes the result in the low-order quadword of the destination (first source). The high-order quadword of the destination is not modified. The first source/destination operand is an XMM register. The second source operand is another XMM register or 64-bit memory location. Mnemonic Opcode Description SUBSD xmm1, xmm2/mem64 F2 0F 5C /r Subtracts low-order double-precision floating-point value in an XMM register or in a 64-bit memory location from low-order double-precision floating-point value in another XMM register and writes the result in the destination XMM register. xmm1 xmm2/mem64 127 64 63 0 127 64 63 0 subtract subsd.eps Related Instructions SUBPD, SUBPS, SUBSS rFLAGS Affected None SUBSD 375
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